DAQ PCI-EK01 User Manual page 4

Analog Input
Analog Output
Digital I/O
Timer/Counter
Software
Supported OS W indows 2000/XP/W indows 7
API Kernel mode W DM Driver/ User mode DLL
Test Application(W aveform Generator, W aveform Display)

Very flexible to upgrade because of FPGA is used as PCI bridge and
overall board

12bit resolution/ 8 Single ended or 4 differential input

0 to +3.3V, ± 1.65V input range/ MAX 200Ksps(5uSEC) conversion
time

Can change sampling interval in auto scanning mode by 2.5uSEC
increment

Power on auto-calibration/ ± 1 (LSB) INL/DNL

± 1uA analog input leakage current/ 20pF analog input capacitance

On-board 1024 x 16 data FIFO/ On -board 256K(type A) x 16 data
SRAM

12bit resolution/ 4 channel output/ 0 to +3.3V output range

MAX 1M (1uSEC) update rate

Can change update interval in waveform generation mode by 1uSEC
increment

Simultaneous update of outputs

± 16 (LSB) INL/
0.7V/usec

On-board 1024 x 16 waveform generation dual -port RAM

On-board 82C55 chip/

Three 8bit group(Port A/B/C)/ 3.3V CMOS logic level

Port B has high current sink capability (max 500mA)

32-bit Timer/ 32-bit Counter

Input frequency max 60Mhz/ 25n timer resolution

One-shot or alternate timer output mode/
± 1 (LSB) DNL/ ± 3 (LSB) Offset error/
24bit general purpose I/O
4-
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PCI-EK01 Users Manual (Rev 1.0)
Slew Rate
3.3V CMOS logic level
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