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PCI-FRM01 Register Level
Application Guide (Ver1.1)
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Copyrights 2005 DAQ system, All rights reserved.
2005 DAQ system, all rights reserved.
Application Note
PCI-FRM01 Register Level Application Guide
http://www.daqsystem.com
(AN241)
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Related Manuals for DAQ PCI-FRM01
Summary of Contents for DAQ PCI-FRM01
- Page 1 Information furnished by DAQ system is believed to be accurate and reliable. However, no responsibility is assumed by DAQ system for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or copyrights of DAQ system.
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Page 2: Table Of Contents
1. PCI BUS Address Space 2. PCI-FRM01 Functional Block Diagram 3. I/O Address Usage 4. Memory Address Usage 5. UART Usage 6. Interrupt Controller Usage 7. LVDS(Camera Link) Interface Usage 8. DIO(Digital Input/Output) Usage References 2005 DAQ system, all rights reserved. http://www.daqsystem.com... -
Page 3: Pci Bus Address Space
Memory Area I/O Area 64DWORD Configuration Area The PCI-FRM01 use a memory and I/O that have been assigned to system for operation, the contents are as follows that they required. Address Area Requirements Remark Memory Maximum 64MByte... -
Page 4: Pci-Frm01 Functional Block Diagram
2. PCI-FRM01 Functional Block Diagram The address area assigned by the system in the PCI-FRM01 division is shown in the figure below. Most peripheral control and status register is in the I/O area, only SDR SRAM is in the memory area. -
Page 5: I/O Address Usage
Universal asynchronous receiver transmitter (RS232C) 70h-AFh Reserved Reserved area for future use Interrupt Interrupt controller Camera Link Frame grabber LVDS interface Photo-coupler isolated Digital input/Output E0h-FFh Reserved Reserved area for future use 2005 DAQ system, all rights reserved. http://www.daqsystem.com... -
Page 6: Memory Address Usage
Description Comment Space 0h - 4000000h Undefined SDR SDRAM 64M Byte Reserved Memory region I/O region 3FFFFFFh Reserved DIO (0xD0) LVDS (0xC0) Interrupt (0xB0) Reserved Reserved 64M Byte UART (0x60) Reserved 000000h 2005 DAQ system, all rights reserved. http://www.daqsystem.com... -
Page 7: Uart Usage
(AN241) Application Note PCI-FRM01 Register Level Application Guide 5. UART Usage The PCI-FRM01 has UART (9600BPS, 1 stop, 1 start, 8 data bit, no parity). I/O Address Function Register Description Offset Data Buffer Transmit Data(Write) / Received Data(Read) Baud Baud generator x”82"... - Page 8 (AN241) Application Note PCI-FRM01 Register Level Application Guide ‘0’ Frame Error ‘0’ Transmit Interrupt ‘0’ Transmit Busy 31 - 2 Reserved For future use All ‘0’ 2005 DAQ system, all rights reserved. http://www.daqsystem.com...
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Page 9: Interrupt Controller Usage
PCI-FRM01 Register Level Application Guide 6. Interrupt Controller Usage PCI-FRM01 has interrupt controller to handle the hardware interrupt for each I/O device. When you use these interrupts, eliminating the use of polling overhead of the process can be reduced. I/O Address... - Page 10 So, it can be cleared and requested the interrupt. On the other hand, in the INT_SRN, it represents current output signal state of the current device. INTERRUPT Source Indicator Bit Position & meaning Reserved Interrupt Source 2005 DAQ system, all rights reserved. http://www.daqsystem.com...
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Page 11: Lvds(Camera Link) Interface Usage
Reserved Name Description Default Value ‘0’ Enable Used for simulation Reset ‘0’ Data ‘0’ Enable ‘0’ Interrupt Enable ‘0’ Start LVDS Internal counter Register Bit Position & meaning Pixel Counter Line Counter 2005 DAQ system, all rights reserved. http://www.daqsystem.com... - Page 12 PC address Dual port ram address Done ‘0’ Data ‘0’ Ready ‘0’ Lvalid ‘0’ Fvalid ‘0’ Interrupt 27-16 LVDS Dual port ram address address Reserved ‘0’ Data ready ‘0’ Hsync Vsync ‘0’ 2005 DAQ system, all rights reserved. http://www.daqsystem.com...
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Page 13: Dio(Digital Input/Output) Usage
(AN241) Application Note PCI-FRM01 Register Level Application Guide 8. DIO(Digital Input/Output) Usage The PCI-FRM01 has 16 Input port and 8 Output port at the Photo-coupler isolated DIO(Digital Input/Output) function. I/O Address Function Register Description Offset Out Port 4Bit Photo-coupler output, 4Bit LVDS output Port... - Page 14 -- PULNix America, Inc. 2. Channel Link Design Guide -- National Semiconductor 3. PCI-EK01(A/B) User’s Manual -- DAQ system 4. DS90CR285/286 chip manual -- National Semiconductor 5. PCI-FRM01 User’s manual -- DAQ system 2005 DAQ system, all rights reserved. http://www.daqsystem.com...