Sony PMW-300 Service Manual page 19

Solid-state memory camcorder
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IF-1244 Board
The MIC input level (-30 dBu to -60 dBu/10 dB step) of the EXT input signal is common to the LINE input level (+4
dBu: input reference -30 dBu selected), and the gain of this signal is adjusted by the switches (Q302 to Q305, Q308 to
Q309).
A speaker is connected to the speaker connector (CN102).
AU-357 Board
The AU-357 board mainly has motherboard, audio, and RTC functions.
Motherboard function
The AU-357 board relays signals to main boards (DPR-355, DCP-64) and power supply boards (RE-321, RE-322) as
a motherboard function.
Audio signal flow
• Input
Analog audio input signals are transferred from the IF-1244 board through the HN-412 board and the A/D converter
to the FPGA (IC501). The digital playback signal (bidirectional bus) is transferred from the DPR-355 board to the
FPGA.
• Input processing by FPGA
The EE input signal is selected by the FPGA and is transferred to the DSP (IC601). The playback signal is transferred
to the DSP.
• Signal processing
The DSP enables many functions including AGC, Wind Filter, monitor volume, monitor switching control, and
SG Tone.
• Output processing by FPGA
The FPGA receives recording signals and SDI output signals from the DSP and outputs them.
• Output
Monitor output signals (headphone or speaker) are transferred from the DSP through the D/A converter to the SP
amplifier and the HP amplifier.
Headphone output signals are output from the RM-241 board through the HN-412 board, IF-1244 board, HN-413
board, and HN-411 board.
Speaker output signals are output from the IF-1244 board through the HN-412 board.
The media recording signal (bidirectional bus) from the FPGA is sent to the DPR-355 board.
The analog line output (RCA pin output of IO-260 board) signal from the DSP is sent to the DCP-64 board through
the D/A converter and SDI output signals from the FPGA are sent to the DCP-64 board.
Control
• The FPGA is totally controlled by the ARM CPU (IC900) on the DCP-64 board through the SIO interface.
• The DSP is booted (SPI boot) by the FPGA and is controlled via the FPGA.
• Analog audio circuit control signals are output by the FPGA.
Clock
• The audio system clock is supplied from IC900 on the DCP-64 board to the FPGA and is distributed from the FPGA
to the A/D converter and the D/A converter.
PMW-300
1-9

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