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6.1.2
Control and status bytes
Channel 1
Process data mode
Control byte 1 in process data mode
Control byte 1 (CB1) is located in the output image, and is transmitted from the controller to the terminal.
Bit
CB1.7
CB1.6
Name
RegAccess -
Legend
Bit
Name
CB1.7
RegAccess
CB1.6
-
CB1.5
RS_CNT_LA
T*
CB1.4
EnLatchFall* 1
CB1.3
EnLatchRise
*
CB1.2
SetCnt
CB1.1
ReadLatch
CB1.0
EnLatchC*
*) Does not apply to KL5152-0000 (KL5151-0050), since the latch input and zero input are not available in
this case. Always set bits CB1.5, CB1.4, CB1.3 and CB1.0 of the KL5152-0000 (KL5151-0050) to 0
EnLatchC or EnLatchRise and EnLatchFall?
If bit CB1.0 (EnLatchC) is set, bit CB1.3 (EnLatchRise) and bit CB1.4 (EnLatchFall) must
not be set, otherwise you cannot know which event has caused a counter value to be
Note
stored in the latch.
Status byte 1 in process data mode
The status byte 1 (SB1) is located in the input image, and is transmitted from terminal to the controller.
KL5151/KS5151, KL5152/KS5152
CB1.5
CB1.4
RS_CNT_L
EnLatchFall EnLatchRise SetCnt
AT
Description
0
Register communication off (process data mode)
bin
reserved
1
The counter is set to zero by an active edge at the latch input
bin
[} 18]. Bits CB1.4, CB1.3 and CB1.0 specify which edge of the
latch signal is active.
The falling edge of the latch input [} 18] is active. The counter
bin
value is stored in the latch register at the first external latch
impulse after the EnLatchFall bit becomes true. The
subsequent pulses do not have any effect on the latch register.
1
The rising edge of the latch input [} 18] is active. The counter
bin
value is stored in the latch register on the first external latch
pulse after the EnLatchRise bit becomes true (this has priority
over EnLatchFall). The subsequent pulses do not have any
effect on the latch register.
A rising edge at SetCnt will set the counter to the 32 bit value that is written by
the controller into the process output data.
0
The current value of the 32 bit counter is mapped to the
bin
process input data.
1
The 32 bit value stored in the latch counter is mapped to the
bin
process input data.
1
The rising edge of the zero input (input C [} 18]) is active. The
bin
counter value is stored in the latch register at the first external
latch impulse after the EnLatchC bit becomes true. The
subsequent pulses do not have any effect on the latch register.
(see note below)
Version: 2.0.0
Access from the user program
CB1.3
CB1.2
CB1.1
CB1.0
ReadLatch
EnLatchC
!
bin
29
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