Test Bench For Example Design - Xilinx I2S Product Manual

Logicore ip, vivado design suite
Table of Contents

Advertisement

Test Bench for Example Design

This section contains information about the provided test bench in the Vivado Design Suite
The above figure shows the test bench for example design. The top-level test bench feeds a clock
input, AXIS data to the exdes. The TB also checks the received AXIS data
• AXIS Data Generator: This module generates the AXIS Audio traffic and feeds the I2S
Transmitter.
• AXIS Data Checker: This modules reads the AXIS data and check for data integrity.
PG308 (v1.0) April 4, 2018
I2S Transmitter and I2S Receiver
Figure 8:
AXIS
AXIS Data
Checker
Test Bench
AXIS
EXDES
Clk_in
www.xilinx.com
Chapter 6: Example Design
AXIS Data
Generator
X20718-042318
[placeholder text]
Send Feedback
34

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the I2S and is the answer not in the manual?

Questions and answers

Table of Contents