Summary of Contents for Keysight Technologies N8241A
Page 1
Keysight N8241A Manual Get Pricing & Availability at ApexWaves.com Call Today: 1-800-915-6216 Email: sales@apexwaves.com https://www.apexwaves.com/signal-generators/keysight-technologies/high-performance-arbitrary-waveform-generators/N8241A...
Page 2
User’s Guide NOTICE: In August 2014, Agilent Technologies’ former Test and Measurement business became Keysight Technologies. This document is provided as a courtesy but is no longer kept current and thus will contain historical references to Agilent. For more information, go to www.keysight.com.
Page 3
Notices Warranty The material contained in this document is provided “as is,” and is subject to being changed, without notice, in future editions. Further, to the maximum extent permitted by applicable law, Agilent disclaims all warranties, either express or implied, with regard to this manual and any information contained herein, including but not limited to the implied warranties of merchantability and fitness for a particular purpose.
(b)(2) (November 1995), as applicable in any technical data. Safety Notices The information contained in this document is subject to change without notice. Agilent Technologies makes no warranty of any kind with regard to this material, including but not limited to, the implied warranties of merchantability and fitness for a particular purpose.
WARNING This is a Safety Class 1 Product (provided with a protective earthing ground incorporated in the power cord). The mains plug shall only be inserted in a socket outlet provided with a protected earth contact. Any interruption of the protective conductor inside or outside of the product is likely to make the product dangerous.
Page 6
This symbol indicates the position of the operating switch for ‘Stand-by’ mode. Note, the instrument is NOT isolated from the mains when the switch is in this position. To isolate the instrument, the mains coupler (mains input cord) should be removed from the power supply. This symbol indicates separate collection for electrical and electronic equipment, mandated under EU law as of August 13, 2005.
MATLAB is a U.S. registered trademark of The Math Works, Inc. Updated Information Where to Find the Latest Information Documentation is updated periodically. For the latest information about the N8241A Arbitrary Waveform Generator, including firmware upgrades and application information, please visit the following Internet URL: http://www.agilent.com/find/synthetic...
Each channel of the AWGs operates at 1.25 GSa/s. The N8241A features 15 bits of vertical resolution and the N8242A 10 bits. Both AWGs offer dual differential output channels to drive both single-ended and balanced designs.
Introducing the N8241/2A AWGs Front Panel Interface Front Panel Interface Figure 1-1 N8241/2A Front Panel Status Indicators Item Description Name EXT CLK IN Use this 50 ohm SMA connector to input an external sample clock. It will accept clock rates in the range of 100 MS/s through 1.25 GS/s.
Page 16
Introducing the N8241/2A AWGs Front Panel Interface Item Description Name CH 1/CH2 Out The CH 1 OUT and CH 2 OUT positive (+) connectors are used for single-ended operation. Use both the positive (+) and negative (-) connectors for differential operation. Refer “Signal Conditioning”...
Page 17
• The instrument hostname is set to A-N82XXA-NNNNN, where N82XXA is the instrument model number (such as N8241A) and NNNNN represents the last five digits of the instrument serial number. TRIGGER IN/OUT These SMB trigger input and output connectors are used to control the waveforms and create event-based signal simulation.
Introducing the N8241/2A AWGs Front Panel Interface Status Indicators The power indicator has the following states: State Power Status Illumination No Power None STANDBY Standby Power Solid Amber Power is on Solid Green The LAN indicator has the following states: State LAN Status Illumination...
Page 19
Introducing the N8241/2A AWGs Front Panel Interface 1588 The IEEE 1588 Clock Status has the following states: State Clock Status Illumination Not synchronized None Synchronized, clock is IEEE 1588 Solid Green Slave Synchronized, clock is IEEE 1588 Blinking Green Master (once every second) Synchronized, clock is IEEE 1588...
Introducing the N8241/2A AWGs Rear Panel Interface Rear Panel Interface Figure 1-2 N8241A Rear Panel Item Description Name LXI TRIG BUS This interface enables the instrument to detect any LXI trigger bus events or LXI LAN-based events and can output such events.
Page 21
Introducing the N8241/2A AWGs Rear Panel Interface Item Description Name This local area network (LAN) interface allows communication through a 100BaseT LAN cable. The USB port is reserved for future applications. Electrostatic discharge (ESD) can damage the highly sensitive components in your instrument.
Figure 1-3 displays the first level of the GUI. For more information on the GUI, refer to the N8241A Online Help. Access this from the application Help menu, or in Windows: Start > Programs > Agilent > N8241A > Help...
Required Software ® • Windows.NET Framework, Version 1.1 Redistributable Package, Service Pack 1 or later (included on the N8241A CD) • IVI Compliance Package Version 2.3 or greater, which includes the IVI Shared Components (download from www.ni.com) • Agilent IO Libraries Suite 14.1 or greater with Patch 2 (download from www.agilent.com)
Page 24
4. Download the Agilent IO Libraries Suite 14.1 with Patch 2. to:http://www.agilent.com/find/iolib 5. Insert the N8241A CD into the CD drive on your PC and follow the instructions. CAUTION Before switching on this instrument, make sure the supply voltage is in the specified range.
Introducing the N8241/2A AWGs Getting Started Connecting to the AWG over the LAN 1. Open the Agilent Connection Expert (double-click the icon). NOTE The Agilent Connection Expert will work only if Agilent VISA is operating as the primary VISA driver. If it is operating as the secondary driver, and another VISA such as NI VISA is the primary, you will need to add the N8241/2A using the tools of the primary VISA.
Page 26
Introducing the N8241/2A AWGs Getting Started 4. Enter the host name of the AWG in the LAN Instrument secondary window. 5. Click OK. Chapter 1...
Page 27
Introducing the N8241/2A AWGs Getting Started 6. The AWG is now configured to the PC. Chapter 1...
Introducing the N8241/2A AWGs Verifying System Operation Verifying System Operation Prior to verifying system operation, the N8241A software must be installed on the PC and the LAN line connected to the PC and AWG module. For more information refer to “Installing the Software”...
Page 29
2 6. Click Play. The spectrum analyzer cabled to channel 1 should display a spurious free dynamic range (SFDR) of at least -65 dBc for the N8241A as shown in Figure 1-4, and a SFDR of at least -50 dBc for the N8242A, Figure 1-5.
Page 30
Introducing the N8241/2A AWGs Verifying System Operation Figure 1-4 N8241A Playback of a 400 MHz Tone Figure 1-5 N8242A Playback of a 400 MHz Tone You should get the same performance when you connect channel 2 positive (+) to the spectrum analyzer RF input connector.
Introducing the N8241/2A AWGs Shutting Down the System Shutting Down the System Close the N8241A Control Utility. Toggle the front panel switch to place the AWG module in standby mode. Chapter 1...
Introducing the N8241/2A AWGs Maintenance Maintenance Cleaning the Instrument To prevent electrical shock, disconnect the instrument and/or system from mains before cleaning. Use a dry cloth or one slightly dampened with water to clean the external case parts. Do not attempt to clean internally. Cleaning Connectors Cleaning connectors with alcohol shall only be done with the instruments power cord removed, and in a well-ventilated area.
Page 33
Introducing the N8241/2A AWGs Maintenance Chapter 1...
Basic Operation This chapter guides you through the basic operation of the AWG. Prior to following these procedures, the N8241A software must be installed on the PC. Refer to “System Set Up” on page 29 for complete instructions on how to complete this task.
Using the Graphical User Interface Generating a Single Tone Signal Use the following procedure as a guide to basic single-ended waveform playback with the N8241A or N8242A AWG. All waveform parameters need to be set prior to waveform playback NOTE...
Page 36
Basic Operation Using the Graphical User Interface 4. To select the DDS option 330 (lower-left corner of the display), refer to “Selecting the DDS Option” on page 99 5. Select the Output tab and connect a single-ended signal conditioning path to CH1 OUT (+) (click on the node that you want to connect) The connection will automatically enable differential mode.
Page 37
Use the default setting for the play mode and predistortion. Click Play. Figure 2-1 Figure 2-2 display a 100 MHz waveform played back on the N8241A and N8242A respectively. The SFDR is greater than –70.0 dBc for the Chapter 2...
Page 38
Basic Operation Using the Graphical User Interface N8241A and greater than –50.0 dBc for the N8242A. Figure 2-1 N8241A Playback of a 100 MHz Tone Figure 2-2 N8242A Playback of a 100 MHz Tone Chapter 2...
Connect the channel 1 positive (+) output to the spectrum analyzer RF input connector. Open the user interface by double-clicking the N8241A icon placed on the desktop during installation. Select the Output tab and connect a single-ended signal conditioning path to CH1 OUT (+) (click on the node that you want to connect).
Page 40
Use the default setting for the Play Mode and Predistortion. Click Play. For this example, a waveform with five tones was used. The intermodulation distortion produced by the five tones played back on the N8241A is less than –60.0 dBc, Figure 2-3, and less than –45.0 dBc on the N8242A,...
Page 41
Basic Operation Using the Graphical User Interface Figure 2-3 N8241A Playback of Five Tones Figure 2-4 N8241A Playback of Five Tones Chapter 2...
Connect the channel 1 positive (+) output to the spectrum analyzer RF input connector. Open the user interface by double-clicking the N8241A icon placed on the desktop during installation. Select the Output tab and connect a single-ended signal conditioning path to CH1 OUT (+) (click on the node that you want to connect).
Page 43
Basic Operation Using the Graphical User Interface 5. Select the Sequencer tab. 6. From the Segment List select Add. This will bring up a Segment Information secondary window. Browse and select the 500 MHz waveform, then click OK. NOTE For dual channel sequencing, add the same waveform to both channel 1 and channel 2.
Page 44
Basic Operation Using the Graphical User Interface Enter Repetition Count secondary window. Enter 5000 repetitions and click OK. 12. Repeat steps 9, 10, and 11 for the 100 MHz and two-tone waveforms. 13. In the Sequence Definition area, select segment ID 2 and move it below ID 3 using the down arrow.
Page 45
Basic Operation Using the Graphical User Interface Figure 2-6 N8241A Playback of a Sequence Chapter 2...
The resulting skew is small and repeatable. Required Equipment • Two N8241A or Two N8242A AWGs • Personal Computer • N8241A AWG Control Utility Software Cables and Adapters required for 1.25 GHz external clock (Agilent...
Page 47
Basic Operation Using the Graphical User Interface Figure 2-7 Cabling for Two AWG Synchronization Turn the system on. Chapter 2...
Selecting the Master Uni 1. Open an N8241A Control Utility session (double-click the Agilent N8241A icon on the desktop). 2. In the N8241A Open dialog, enter the VISA address for the master unit, then click OK. Figure 2-8 N8241A Selection Window 3.
Start trigger is assigned to Trigger 4 and is grayed out Selecting the Slave Unit 1. Open a second N8241A Control Utility session. 2. Highlight the unit designated as the Slave in the N8241A Selection window list and click OK. 3. Select the desired signal conditioning path.
Specification, and IVI-3.1 Driver Architecture Specification for more information. These can be found at: www.ivifoundation.org/Downloads/Specifications.htm A set of API Functions and Attributes can be found in the N8241A Help system. Go Start > Programs > Agilent > N8241A > Help or from the application menu bar Help >...
% Copyright (C) 2005, 2006 Agilent Technologies, Inc. % A simple example of how to create a waveform, open a % session to the Agilent N8241A AWG, play the waveform, % and close the session. % Note: the waveform must be configured before downloading.
Page 52
Basic Operation Using Programmatic Interfaces disp('Enabling the instrument output'); [errorN, errorMsg] = agt_awg_setstate(instrumentHandle, 'outputenabled', 'true'); if(errorN ~= 0) % An error occurred while trying to enable the output. disp('Could not enable the instrument output'); return; disp('Setting the instrument to ARB mode'); [errorN, errorMsg] = agt_awg_setstate(instrumentHandle, 'outputmode', 'arb');...
Basic Operation Using Programmatic Interfaces [errorN, errorMsg] = agt_awg_playwaveform(instrumentHandle, waveformHandle); if(errorN ~= 0) % An error occurred while trying to playback the waveform. disp('Could not initiate playback of the waveform on the instrument'); return; disp('Press ENTER to close the instrument session and conclude this example.');...
Page 54
Basic Operation Using Programmatic Interfaces % Try to open a session disp('Opening a session to the instrument'); [instrumentHandle2, errorN, errorMsg] = agt_awg_open('TCPIP','TCPIP0::A-N8241-90XXX::inst0::INST R'); if errorN ~= 0 disp(errorN); disp(errorMsg); disp('program stopped'); return; else disp('ok'); [instrumentHandle1, errorN, errorMsg] = agt_awg_open ('TCPIP','TCPIP0::A-N8241-90XXX::inst0::INSTR'); if errorN ~= 0 disp(errorN);...
Page 55
Basic Operation Using Programmatic Interfaces disp(errorMsg); disp('program stopped'); return; else disp('ok'); [errorN, errorMsg] = agt_awg_setstate(instrumentHandle2, 'outputenabled', 'true'); if errorN ~= 0 disp(errorN); disp(errorMsg); disp('program stopped'); return; else disp('ok'); disp('Setting the instrument to ARB mode'); [errorN, errorMsg] = agt_awg_setstate(instrumentHandle1, 'outputmode', 'arb'); if errorN ~= 0 disp(errorN);...
Page 59
Basic Operation Using Programmatic Interfaces else disp('ok'); [errorN, errorMsg] = agt_awg_initiategeneration(instrumentHandle1); if errorN ~= 0 disp(errorN); disp(errorMsg); disp('program stopped'); return else disp('ok'); disp('Press ENTER to close the instrument session and conclude this example.'); Chapter 2...
Basic Operation Using Programmatic Interfaces C/C++ Example Program /* Example for programming the N8241A IVI-C driver. Copyright (C) 2005, 2006 Agilent Technologies, Inc. This will compile and link into a working.EXE file. For Compile: Add include path = C:\Program Files\IVI\include,...
Page 61
Fsig = 500e6; // Set this to a CW frequency // <= 500 MHz double Fs = 1.25e9; // Sample Clock Frequency // Initialize N8241A and setup session handle rc = AGN6030A_init(resourceName, IDQuery, resetDevice, &session); if (rc != VI_SUCCESS) return -1;...
Page 62
Basic Operation Using Programmatic Interfaces if (rc != VI_SUCCESS) return -1; rc = AGN6030A_ConfigureOutputEnabled(session, "2", VI_TRUE); if (rc != VI_SUCCESS) return -1; // Select the Internal Sample Clock and an //External Reference Clock rc = AGN6030A_ConfigureSampleClock(session, AGN6030A_VAL_CLOCK_INTERNAL, Fs); if (rc != VI_SUCCESS) return -1;...
Page 63
Basic Operation Using Programmatic Interfaces ifWfm[i] = sin(twopi * (Fsig/Fs) * (double)i); // Set N8241A output mode to ARB in preparation of // downloading and playing our waveform. rc = AGN6030A_ConfigureOutputMode(session, AGN6030A_VAL_OUTPUT_ARB); if (rc != VI_SUCCESS) return -1; // Download the waveform to both channels 1 and 2 // even if 2is not used.
Page 64
Basic Operation Using Programmatic Interfaces Chapter 2...
Page 65
Basic Operation Using Programmatic Interfaces Chapter 2...
Theory of Operation This chapter includes the following topics that explain the theory behind the functionality of the N8241A and N8242A Arbitrary Waveform Generators. N8241/2A Block Diagram Clock I/O Waveform Playback Basic Sequencing Advanced Sequencing Markers Triggers Synchronous Triggers Signal Conditioning...
AWGs that offer wide bandwidth as well as excellent signal fidelity. The AWG was developed incorporating a high performance Agilent digital-to-analog converter (DAC) designed to clock up to 1.25 GHz. The N8241A has 15 bits of vertical resolution and the N8242A 10 bits. The DACs are fully differential and the AWGs support both single-ended and differential outputs through the analog signal conditioning path.
Theory of Operation Clock I/O Clock I/O 10 MHz In A 10 MHz reference is required when using the internal clock. You can use either the (AutoSense) 10 MHz REF IN (the default) or the AUX 10 MHz REF IN connector to supply the 10 MHz reference.
It can hold up to 32768 segments (waveforms with a specified loop count). Waveform Memory The waveform memory contains Channel 1 and Channel 2, and output marker data. NOTE The N8241A Control Utility GUI only supports basic sequencing. Advanced sequencing features can only be accessed through the programmatic interfaces. Chapter 3...
This extends the waveform play time achievable with the available memory. Basic sequencing can be done using the software N8241A Control Utility GUI or through the programmatic interfaces. Figure 3-1...
Theory of Operation Waveform Playback segments. Each waveform segment is played out according to its segment and sequence definition. A total of 1 million (220) loops can be defined for each segment. After the last segment loop is executed, the entire sequence can repeat continuously or for the predefined number of times.
Theory of Operation Waveform Playback Scenario Advance Mode The play table can be configured to play a scenario once or continuously after starting. • Single The scenario plays once and then waits for a trigger. While waiting for a trigger, the value of the last waveform continues to play.
Page 73
Theory of Operation Waveform Playback Figure 3-2 Advanced Sequencer Flow Chart Figure 3-3 Chapter 3...
Theory of Operation Waveform Playback Waveform Advancement In basic sequencing, waveforms always advance to the next waveform automatically after the specified number of repetitions. With advanced sequencing, waveforms can be configured to advance in one of four ways: • Automatic The waveform automatically advances to the next waveform after completing the specified number of loop repetitions.
Theory of Operation Waveform Playback • End of Scenario The current scenario is completed before jumping to the new scenario. The jump latency is the longer of either the jump immediate latency or the length of the remaining part of the current waveform. If the remaining part of the scenario is less than the jump immediate latency, the scenario is repeated one more time before jumping.
Page 76
Theory of Operation Waveform Playback Figure 3-3 Waveform Play Flow Chart Chapter 3...
Page 77
Theory of Operation Waveform Playback Figure 3-4 Scenario and Sequence Play Flow Charts Chapter 3...
Theory of Operation Waveform Playback Markers The N8241/2A AWG provides four front panel marker output connectors that can be used for system synchronization and triggering. The following markers can be enabled: • Ch 1 Memory Marker 1 and Memory Marker 2 •...
Theory of Operation Waveform Playback front panel trigger out connector. There are 16 marker output selections for the LXI trigger bus; LAN 0–7 and LXI 0–7. Markers can be set in the sequencer to be at any point in the data with a positive or negative polarity.
Theory of Operation Waveform Playback Triggers 1,2,3,4 These four trigger inputs can be used to control waveforms in the sequencer. Hardware trigger inputs may be configured to generate events on the rising or falling SYNC clock edges, but not both at the same time. The trigger threshold can be set between –4.5 and +4.5V.
Theory of Operation Waveform Playback Synchronous Triggers Triggers are registered into the AWG using the SYNC clock. The SYNC clock is nominally at the sample clock frequency divided by 8. However, at lower sample rates an internal variable modulus prescaler selects other binary divide ratios: 4, 2, and 1.
Page 82
Theory of Operation Signal Conditioning Signal Conditioning Single-Ended Mode Single-ended mode has two modes of operation with signal output through the positive (+) port. The negative port (-) is reserved for differential mode. Passive mode has an adjustable output level of up to 0.5Vp-p This mode gives the greatest single-ended signal fidelity because there is a balun in the path that suppresses the second order harmonic.
Theory of Operation Signal Conditioning Differential Mode The differential mode has an output level of up to 0.5Vp-p. This mode provides exceptional signal fidelity into true differential inputs (which provide common mode rejection). A larger differential output voltage is also obtained without the use of the amplifier.
Theory of Operation Digital Predistortion Digital Predistortion The predistortion function compensates for the variation in the magnitude of the output response as a function of frequency. This variation is the result of the sin x/x (sinc) roll-off of the internal DAC and the frequency response of the reconstruction filter.
Page 85
Theory of Operation Multiple Module Synchronization Multiple Module Synchronization Within each AWG, the two channels are synchronized by design. Some systems, such as phased array radar, require more than two synchronized channels. The AWG is designed to support the synchronization of up to 16 channels through the use of eight AWGs.
Theory of Operation Multiple Module Synchronization Figure 3-8 Cabling for Internal Clock Synchronization The trigger cables should all be the same length. The trigger inputs are high impedance and several inputs can be driven in parallel without matched passive splitters. The synchronous trigger timing can be determined in the same way as any synchronous trigger into the AWG.
Theory of Operation Multiple Module Synchronization external Sample clock can be in the range of 625 MHz to 1.25 GHz. The Sample clock provides the final retiming of the analog output from each AWG. Any skew in the Sample clock cable delays between the multiple modules will result in the same skew in the analog outputs.
Page 88
Theory of Operation Multiple Module Synchronization Figure 3-9 Cabling Using and External Clock Chapter 3...
Page 89
Theory of Operation Multiple Module Synchronization Multiple Module Synchronous Trigger Timing Triggers are registered into the AWG using the SYNC clock. The SYNC clock is nominally at the sample clock frequency divided by 8. However at lower sample rates an internal variable modulus prescaler selects other binary divide ratios: 8, 4, 2, and 1.
Theory of Operation Multiple Module Synchronization Figure 3-10 Multiple Module Synchronous Trigger Timing Diagram Cable Length and Skew The cabling requirements are as follows: Sample Clock Skew less than 10 mm between modules. The absolute SYNC cable length is Equation given by the as a function of the Sample clock frequency: Sample Clock Skew Formula...
Page 91
Theory of Operation Multiple Module Synchronization Chapter 3...
Dynamic Sequencing Option 300 The dynamic sequencing option enables you to access up to eight thousand previously stored scenarios through a 16-bit interface. This functionality gives you the ability to build custom signal scenarios to simulate dynamically changing environments. Dynamic Sequencing AUX PORT Connector Signal Levels Signal Descriptions...
Dynamic sequencing is a mode where the AWG scenario handle memory is bypassed and scenarios are selectedfrom an external source. You must first load the data into the N8241A LXI-AWG memory, then, in real-time, provide the scenario handles through the AUX PORT input connector.
Page 94
Dynamic Sequencing Option 300 Dynamic Sequencing Figure 4-2 AUX PORT Pin Outs Table 4-1 Pin Assignment Pin No. Signal Assignment Trigger Ground Data Valid CH 1/CH 2 (Reserved, set low) Ground Ground Ground Chapter 4...
Dynamic Sequencing Option 300 Dynamic Sequencing Signal Levels All pins are configured as 2.5 V, LVCMOS inputs. The logic levels must be within the following ranges: −0.2 to +0.5 V High +2.0 to +2.8 V Signal Descriptions Data Input The input data represents a handle to the next scenario to be played by the AWG module.
Direct Digital Synthesis Option 330 The direct digital synthesis (DDS) architecture in the N8241A Series AWGs enables you to create basic waveforms in the AWG memory and then modify the behavior of the waveforms with profiles for amplitude, phase and frequency modulations.
Direct Digital Synthesis Option 330 Direct Digital Synthesis Direct Digital Synthesis The N8241A direct digital synthesis application can be managed through the Control Utility graphical user interface (GUI) or one of the supported programmatic interfaces. Accessing DDS through the GUI is the easiest way to view the functionality as many details are handled by the software in the background.
Direct Digital Synthesis Option 330 Direct Digital Synthesis Direct Digital Synthesis Using the Control Utility NOTE A spectrum analyzer is required to display the waveform. Configuring the Equipment 1. Connect a 10 MHz reference from the spectrum analyzer to the AWG front panel connector.
Direct Digital Synthesis Option 330 Direct Digital Synthesis path to CH1 OUT (+) (click on the node that you want to connect). The connection will automatically enable differential mode. Click on the negative (-) node to open this path and enable single-ended mode. Configuring the Clock 1.
2. From the Segment List select Add. This brings up a Segment Information window. 3. Browse and select the DDS_All_Ones waveform from the Demo Waveform DDS folder included on the N8241A Series CD or the memory stick, then click OK. NOTE For dual channel sequencing, add waveforms of the same length to both channel 1 and channel 2.
Page 101
Direct Digital Synthesis Option 330 Direct Digital Synthesis 4. In the Segment List, select the DDS_All_Ones waveform. Chapter 5...
Page 102
Direct Digital Synthesis Option 330 Direct Digital Synthesis 5. In the Sequence Definition area, select Add. This brings up the DDS Sequence Input window. 6. Enter 5000 repetitions and accept all default settings. Click OK. NOTE The values entered in the DDS Sequence Input window are recorded in the sequence definition area of the Sequencer tab.
Page 103
Direct Digital Synthesis Option 330 Direct Digital Synthesis Figure 5-2 Sequencer Tab 9. Click Download & Play. The spectrum of the sequence should be similar to the one shown in Figure 5-3. Chapter 5...
Direct Digital Synthesis Option 330 Direct Digital Synthesis Figure 5-3 Playback of a Sequence The 250 MHz carrier (marker 1) and the 400 MHz carrier (marker 2) are combined with a waveform composed of all ones.This illustrates how the DDS engine produces sine waves when a constant frequency is specified. Out of Range Input Values Some values may cause an 'out of range' condition.
Page 105
Direct Digital Synthesis Option 330 Direct Digital Synthesis Figure 5-4 DDS Sequence Input Window Notice the question marks in the Frequency Slope box. This is occurs when the combination of the loop count, the initial frequency, and the end frequency cannot be calculated correctly. If you select OK, a message window comes up.
Page 106
Direct Digital Synthesis Option 330 Direct Digital Synthesis Figure 5-6 Calculated Valid Settings The end frequency value was adjusted to enable the slope count. NOTE This type of ‘out of range’ condition may also occur with amplitude settings. Chapter 5...
Theory of Operation The Direct Digital Synthesis, Option 330, is a powerful tool for those customers who are using the N8241A Arbitrary Waveform Generator (AWG) to synthesize waveforms best expressed in the frequency domain. Traditionally, waveforms are expressed in the time domain, sampled, and then stored in waveform memory for eventual playback.
Page 108
Direct Digital Synthesis Option 330 Theory of Operation requiring phase continuous frequency hopping. The DDS generates both sine and cosine outputs for use in the complex modulator. Refer to Figure 5-7. To allow waveform memory to be played back at a rate slower than the AWG sample rate, interpolation filters have been added to the main FPGA, for both channels.
Page 109
Direct Digital Synthesis Option 330 Theory of Operation Figure 5-7 Chapter 5...
Troubleshooting The following topics are included in this chapter. Software Removing the Software Moving the Software Updating the Software Initializing the LAN Configuration Contacting Agilent...
Updating the Software To resolve an error message you get while attempting to upgrade the N8241A software, take the following steps in the listed order: 1. Go to: Start > Settings > Control Panel > Add/Remove Programs 2.
• The instrument hostname is set to A-N82XXA-NNNNN, where N82XXA is the instrument model number (such as N8241A) and NNNNN represents the last five digits of the instrument serial number. If the instrument is in an environment with a DHCP server, it is assigned an IP address through DHCP.
Troubleshooting Contacting Agilent Contacting Agilent By internet, phone, or fax, get assistance with all your test and measurement needs. Table 6-1 Contacting Agilent Online assistance: http://www.agilent.com/find/assist United States Latin America Canada Europe (tel) 1 800 452 4844 (tel) (305) 269 7500 (tel) 1 877 894 4414 (tel) (+31) 20 547 2323 (fax) (305) 269 7599...
Technical Characteristics The following topics are included in this chapter. Technical Characteristics General Characteristics...
Page 115
N8242A: 10 bits Output spectral purity (CH1 and CH2) Harmonic Distortion: 1 kHz to 500 MHz • N8241A < -65 dBc for each channel • N8242A < -50 dBc for each channel Non-Harmonic Distortion: 1 kHz to 500 MHz •...
Page 116
Technical Characteristics Noise floor • N8241A < -150 dBc/Hz across the channel bandwidth • N8242A < -150 dBc/Hz across the channel bandwidth Sample clock • Internal: Fixed 1.25 GS/s • Internal clock output: +3 dBm nominal into 50 ohm load •...
Page 117
Technical Characteristics Waveform length • 8 MS per channel (16 MS with option 016) • Minimum waveform length: 128 samples • Waveform granularity: 8 samples Segments From 1 to 32,768 unique segments can be defined consisting of waveform start and stop address, repetitions and marker enable flags. Sequences Up to 16,384 total unique waveform segments can be combined with separate loop counts to form a sequence.
Page 118
Technical Characteristics Trigger In* • Trigger impedance: 4k ohms • Trigger level:LVTTL *Trigger In has additional latency. LXI Trigger Bus • All physical and electrical characteristics conform to LXI Standard Revision 1.1. External markers Markers can be defined for each waveform segment. Front Panel Markers 1/2/3/4 •...
Technical Characteristics • 2.4V nominal when terminated into a 50 ohm load *Trigger Out has additional latency. LXI Trigger Bus • All physical and electrical characteristics conform to LXI Standard Revision 1.1 Module synchronization • Hardware supports synchronization of multiple AWGs with future software enhancements.
Page 120
Technical Characteristics • Single-Ended Active Mode1.0Vp-p with ±0.2Vp-p • Differential Active Mode: N/A Reconstruction filters • 500 MHz and 250 MHz realized as 7-pole elliptical filters plus thru-line output Chapter 7...
Technical Characteristics General Characteristics Power Line power: 100/120/220/240 V AC, 50/60 Hz, 100 Watts maximum Environmental Samples of this product have been type tested in accordance with the Agilent Environmental Test Manual and verified to be robust against the environmental stresses of Storage, Transportation, and End-use; those stresses include but are not limited to temperature, humidity, shock vibration, altitude, and power line conditions.
Page 122
Technical Characteristics Dimensions • Height: 89 mm (3.5 inch) • Width: 213 mm (8.375 inch) • Depth: 422 mm (16.625 inch) Recommended calibration cycle • 12 months ISO compliance This instrument is manufactured in an ISO-9001 registered facility in concurrence with Agilent Technologies, Inc. commitment to quality. •...
Page 123
Technical Characteristics Options • N8241A-016: Waveform memory expansion to 16 MS per channel • N8241A-300 Dynamic Sequencing • N8241A-330 Direct Digital Synthesis (DDS) Chapter 7...
Page 124
MATLAB, synchronizing two single tone Clock N8241/2As graphic clock i/o graphical user interface 10 MHz ref n8241a control utility external clock rear panel graphical user interface internal clock out graphic using sync clocks interface description compliance...
Page 125
Index hardware operating systems safety notices software safety symbols system shutdown scenario advance mode jump mode pointer source technical characteristics start/trigger source module synchronization sequence sequences advanced theory basic example marker memory synchronization of multiple play table modules setting synchronous trigger timing clock configuration synchronous triggers output mode...
Need help?
Do you have a question about the N8241A and is the answer not in the manual?
Questions and answers