NXP Semiconductors HCS12 Reference Manual
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NXP Semiconductors HCS12 Reference Manual

NXP Semiconductors HCS12 Reference Manual

Usb2.0 to ata/atapi bridge
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USB2.0 to ATA/ATAPI Bridge
Designer Reference Manual
HCS12
Microcontrollers
DRM062
Rev. 0
1/2005
freescale.com

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Summary of Contents for NXP Semiconductors HCS12

  • Page 1 USB2.0 to ATA/ATAPI Bridge Designer Reference Manual HCS12 Microcontrollers DRM062 Rev. 0 1/2005 freescale.com...
  • Page 3 USB2.0 to ATA/ATATPI Bridge Designer Reference Manual Dennis Lui and Derek Lau Applications Engineering Microcontroller Division Hong Kong To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://www.freescale.com Freescale™...
  • Page 4 Revision History The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. Revision History Revision Page Date Description Level Number(s) Jan 2005 Initial release USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0 Freescale Semiconductor...

  • Page 5: Table Of Contents

    Table of Contents Chapter 1 System Overview Introduction ..............7 System Features .
  • Page 6 Table of Contents Chapter 7 USB Mass Storage Interface Driver Introduction ..............21 USB Mass Storage Class Bulk-Only Transport .

  • Page 7: System Overview 1.1 Introduction

    Chapter 1 System Overview 1.1 Introduction This manual describes a reference design of a Universal Serial Bus (USB) 2.0 to ATA/ATAPI Bridge solution by using the MC9S12UF32 microcontroller. Since the MC9S12UF32 is a highly integrated USB 2.0 high speed device for mass storage applications, the system consists of the MC9S12UF32 and passive components only.

  • Page 8: System Overview

    System Overview MC9S12UF32 features: • HCS12 CPU core • 32K bytes Flash, 3.5K bytes RAM, 1.5K bytes Queue-RAM • Universal Serial Bus 2.0 controller and transceivers • Integrated Queue controller • ATA/ATAPI controller • CompactFlash controller • Secure Digit and MultiMediaCards controller •...

  • Page 9: Hardware Overview

    Chapter 2 Hardware Overview 2.1 Introduction The system consists of the 64 pin package UF32 and passive components only. The major external component is an MOSFET used for 5V to 3.3V voltage regulation. There are two reference demo boards available: one is USB bus powered for 2.5" hard disk use, another is self-powered for 3.5" hard disk and ATAPI devices use.

  • Page 10: Hardware Functions

    Hardware Overview 2.2 Hardware Functions VDDA MC9S12UF32 BKGD PORTE USB Power VDDR 2.5V REF3V 2.5V PORTM CS0–1, IOWR VDD3X PORTJ DA0–2, IORD, DMACK VDD Core PORTQ RESET CORE PORTT IORDY PORTU DMARQ, INTRQ PORTS D0–D7 PORTB VDDX 5V / 3.3V D8–D15 PORTA Figure 2-3.

  • Page 11: Background Debug Interface

    Background Debug Interface 2.4 Background Debug Interface The single-wired background debug pin BKGD is used for software development and programming. 2.5 USB Interface The UF32 features an integrated Universal Serial Bus (USB) 2.0 controller and physical layer transceivers. An external 1.5kΩ pullup resistor, 510Ω reference resistor, and four serial resistors are required for USB connection.
  • Page 12 Hardware Overview USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0 Freescale Semiconductor...

  • Page 13: Software Overview

    Chapter 3 Software Overview 3.1 System Software Architecture Mini-Kernel for UF32 MCU Resources (Timer, IRQ...) Mass Memory Device Storage Interface Module Device Application Task (Protocol Adapter) USB Mass Storage SCSI Command Module USB Protocol Layer Figure 3-1. System Software Architecture Figure 3-1 shows the system software architecture for the UF32 ATA/ATAPI Bridge.

  • Page 14: Main Program

    Software Overview TIMER INTERRUPT MAIN PROGRAM USB INTERRUPTS CHECK AND SERVE USB ENDPOINT 0 INITIALIZATION HANDLER ANY HOOK FUNCTION INCREASE GLOBAL TIMER USBMS BULK IN USB EVENTS COUNTER FOR EVERY 1ms HANDLER HANDLER USBMS BULK OUT USBMS EVENTS RETURN HANDLER HANDLER OTHER APPLICATOIN RETURN...

  • Page 15: Usb Module

    Chapter 4 USB Module 4.1 Introduction The USB module consists of an integrated Universal Serial Bus (USB) 2.0 controller and physical layer transceivers to provide comprehensive USB specification implementation for both high-speed (480 Mbps) and full-speed (12 Mbps) operations. 4.2 Endpoints Configurations Table 4-1.
  • Page 16 USB Module USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0 Freescale Semiconductor...

  • Page 17: Iqueue Module

    Chapter 5 IQUEUE Module 5.1 Introduction The Intelligent Queue (IQUEUE) module allows automatic data transfer between the USB module and IQUEUE RAM, and between IQUEUE RAM and mass storage devices without CPU intervention. The IQUEUE RAM is configured to address $2000 to $25FF by writing 0x21 to the INITEE register. S12 CPU IQRAM IQUEUE...

  • Page 18: Iqueue Request Mapping

    IQUEUE Module 5.2 IQUEUE Request Mapping Table 5-1. IQUEUE Request Mapping Peripheral Data Flow QCnREQ Direction Functions PC → USB → QRAM QC1REQ = 0 USB ← QRAM ← QC3REQ = 1 QRAM ← ATA QC4REQ = 2 QRAM → ATA QC2REQ = 3 There are four IQUEUE channels of QC1 to QC4 which can be configured to transfer data to and from different peripherals.

  • Page 19: Ata Module

    Chapter 6 ATA Module 6.1 Introduction The ATA host controller is designed according to the AT Attachment with Packet Interface–5 (ATA/ATAPI–5) specification. It can support PIO mode 0 to 4 and UDMA mode 0 to 4 with maximum burst transfer rate of 60M bytes per second. The firmware is written according to the ATA/ATAPI–6 specification, therefore it can support higher than 137G byte capacity.

  • Page 20: Write To Ata Device Registers

    ATA Module 6.2.1 Write to ATA Device Registers 1. Wait if TIP of the Host Status Register = 1 2. ATA device register = data 3. Wait if DRAB = 1 6.2.2 Read from ATA Device Registers 1. Wait if TIP of the Host Status Register = 1 2.

  • Page 21: Usb Mass Storage Interface Driver

    Chapter 7 USB Mass Storage Interface Driver 7.1 Introduction The driver is implemented according to the specification of the USB Mass Storage Class Bulk-Only Transport and the specification of the Small Computer Computer Interface 2. We have chosen the Bulk-Only Transport rather than the Command Bulk Interrupt because the drivers for the Bulk-Only Transport are embedded in the Windows 2000 and the Windows XP operating systems.

  • Page 22: Usb Command Block Wrapper

    USB Mass Storage Interface Driver READY HOST SENDS OUT CBW DATAx 31 BYTE CBW HOST SENDS OUT DATA DEVICE RETURNS DATA DATA DATA DATAx DATAx MORE DATA MORE DATA TO SEND? TO RECEIVE? DEVICE RETURNS CSW DATAx 13 BYTE CSW Figure 7-1.

  • Page 23: Usb Command Status Wrapper

    USB Mass Storage Class Bulk-Only Transport 7.2.2 USB Command Status Wrapper The USB Command Status Wrapper (CSW) starts on a packet boundary and ends as a short packet with exactly 13 bytes transferred. The bCSWStatus indicates the success or failure of the command. The device shall set this byte to zero if the command is completed successfully, to 1 if failed, and to 2 for phase error.
  • Page 24 USB Mass Storage Interface Driver Table 7-5. CDB of 12-Byte Command Operation Code Reserved (0) Service Action (if required) 2–5 (MSB byte 2) Logical Block Address (if required) (LSB byte 5) (MSB byte 6) Transfer Length (if required) 6–9 Parameter List Length (if required) Allocation length (if required) (LSB byte 9) Reserved...

  • Page 25: Example Of Command Block Wrapper

    Driver Structure 7.2.4 Example of Command Block Wrapper Table 7-8. Example of a CBW containing SCSI Write_10 Command USB CBW SCSI Command Bytes Data (HEX) Bytes Data (HEX) Meaning 0–3 55 53 42 43 (Signature) Write_10 4–7 A8 1A A4 FF (Tag) Not used 8–11 00 10 00 00 (Length)
  • Page 26 USB Mass Storage Interface Driver HOST SENDS OUT CBW DATAx 31 BYTE CBW SCSI COMMAND HANDLING HOST TO RECEIVE NO DATA TRANSFER HOST TO SEND DATA DATA FROM DEVICE IS EXPECTED TO DEVICE COMMAND COMMAND COMMAND SUPPORTED? SUPPORTED? SUPPORTED? HOST SENDS OUT DATA COMMAND ERROR FOUND? SUCCESS?

  • Page 27: Commands Without Data Transfer

    Driver Structure 7.3.1.1 Commands Without Data Transfer Since no data transfer is required. After processing the CBW, the UF32 will return the 13 bytes of CBW. 7.3.1.2 Host Sends out Data to Storage Device After sending out a 31 byte CBW, the host continues to send data to the UF32. If error happens and the UF32 has not acknowledge (ACK) all the data from the host, the OUT endpoint is STALLED to inform the host that the UF32 is not able to accept further data.
  • Page 28 USB Mass Storage Interface Driver USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0 Freescale Semiconductor...

  • Page 29: Ata/Atapi Driver

    Chapter 8 ATA/ATAPI Driver 8.1 Introduction The driver is implemented according to the specification of the AT Attachment with Packet Interface-6 (ATA/ATAPI-6). 8.2 ATA and ATAPI Devices ATA devices are those that do not implement the Packet command feature set, while ATAPI devices are those that implement it.

  • Page 30: Commands Without Data Transfer

    ATA/ATAPI Driver SCSI commands are passed to ATAPI devices by calling the ATA Packet command. Therefore, for ATAPI devices, the USBMS driver will directly call the ATA_PacketCommad() and passes the SCSI CDB parameters to the devices. For ATA devices, the USBMS driver will either: •...
  • Page 31 Software Functions Table 8-2. ATA Error Code Definitions Error Code Description 0x00 Command Passed 0x01 Command Failed 0x02 Unrecoverable Error (e.g. timeout) The following tables show the summary of all the ATA/ATAPI drivers. ATA_PacketCommand Description ATA Packet Command for ATAPI devices only muint16 *pCommand Input 6 or 8 words of ATAPI command...
  • Page 32 ATA/ATAPI Driver ATA_SCSIInquiry Handle SCSI Inquiry Command by getting the ATA/ATAPI devices Description information and put corresponding data into buffer muint16 *pBuffer buffer pointer of 24 words for storing temporary data and result Input muint16 XferLen transfer length in byte specified in the SCSI command Output 32 bytes of SCSI Inquiry result into the buffer Return...
  • Page 33 Software Functions ATA_SetUDMATiming Description Set ATA hardware module Timing in UDMA mode muint8 UDMAMode Input UDMA mode 0–4 Output Return ATAErrorCode ATA_Init Description Initialize ATA hardware module and reset the ATA/ATAPI device Input Output Return ATAErrorCode ATA_Command Description Send ATA Command to ATA/ATAPI device sATACommand *ATACommand Input structure point of 7 byte command plus...
  • Page 34 ATA/ATAPI Driver ATA_GetSetDeviceInfo Description Get device information and set global variables muint16 *pBuffer Input buffer pointer with 128 words to store temporary data gATADevice Info indicate it’s ATA or ATAPI device gATAPacketLen Output ATAPI packet length is 12 or 16 bytes gATAUDMAMode Maximum UDMA mode that device supports Set ATA/ATAPI device with maximum PIO and UDMA mode...

  • Page 35: Test And Customization

    Chapter 9 Test and Customization 9.1 Testing This reference design was tested with different ATA/ATAPI devices and under different Windows Operating Systems on several different PCs. • USB compliance test using Command Verifier version 1.21 • Compatibility tests under Windows 98 SE, 2000 and XP •...

  • Page 36: Firmware

    Test and Customization 9.2.2 Firmware There are six targets created in the Codewarrior version 3.1 project: • Development (100-pin) • Development (64-pin) • Self-powered (64-pin) • Bus-powered (64-pin) • Amadeus (64-pin) • Amadeus (100-pin) The project file is under the “Application” directory. The project supports the self-powered demo board (64-pin), the USB bus-powered demo board (64-pin), and the M68KIT912UF32 board (100-pin).
  • Page 38 How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Information in this document is provided solely to enable system and software Technical Information Center implementers to use Freescale Semiconductor products.

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