Philips DVDR9000H/75 Service Manual page 215

Hdd & dvd recorder
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PIN DESCRIPTION
Pin Name
Input/Output
D G N D
G
A G N D
G
C L K I N _ A
I
C L K I N _ B
I
C O M P 1 , 2
O
DAC A
O
DAC B
O
DAC C
O
DAC D
O
DAC E
O
D A C
F
O
P_HSYNC
I
P_VSYNC
I
P_BLANK
I
S_BLANK
I
S_HSYNC
I
S_VSYNC
I
Y 9 - 0
I
C 9 - C 0
I
S 9 - S 0
I
RESET
I
R
I
SET1,2
S C L k
I
Circuit- and IC description
Function
Digital Ground
Analog Ground
Pixel Clock Input for HD (74.25MHz Only , PS Only (27MHz), SD Only
( 2 7 M H z ) .
Pixel Clock Input. Requires a 27MHz reference clock for Progressive Scan
Mode or a 74.25MHz (74.1758MHz) reference clock in HDTV mode. This
Clock is only used in dual Modes.
Compensation Pin for DACs. Connect 0.1uF Capacitor from COMP pin to
V
.
AA
CVBS/ GREEN/ Y / Y analog output.
Chroma/ BLUE/ U / Pb
analog output.
Luma/ RED/ V / Pr
analog output.
In SD onlyu mode: CVBS/Green/Y analog outptu, in HD only mode and
simultaneous HD/SD mode: Y/Green [HD] analog output.
In SD onlyu mode: Luma/Blue/U analog outptu, in HD only mode and
simultaneous HD/SD mode: Pr/Red
In SD onlyu mode: Chroma/Red/ V analog outptu, in HD only mode and
simultaneous HD/SD mode: Pb/Blue [HD] analog output.
Video Horizontal Sync Control Signal for HD in simultaneous Sd/HD
mode and HD mode only.
Video Vertical Sync Control Signal for HD in simultaneous SD/HD mode and
HD mode only.
Video Blanking Control signal for HD in simultaneous SD/HD mode and HD
mode only.
Video Blanking Control Signal for SD only.
Video Horizontal Sync Control Signal for SD only.
Video Vertical
Sync Control Signal for SD only.
SD or Progressive scan/ HDTV input port for Y data.
Input port for interleaved Progressive Scan data. The LSB is set up
on pin Y0. For 8-bit data input LSB is set up on Y2.
Progressive Scan/ HDTV input port :4:4 input mode this port is used for
the Cb[Blue/U] data. The LSB is set up on pin C0. For 8-bit data input LSB is
set up on C2.
SD or Progressive Scan/HDTV input port for Cr [Red/V] data in 4:4:4 input
mode. LSB is set up on pin S0. For 8-bit data input LSB is set up on S2.
This input resets the on-chip timing generator and sets the ADV7310/11
into Default Register setting. Reset is an active low signal.
A
3040 Ohms resistor must be connected from this pin to AGND and is used
to control the amplitudes of the DAC outputs.
I2C Port Serial Interface Clock Input .
3139 785 31681
analog output.
9.
EN 215

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