Philips DVDR9000H/75 Service Manual page 162

Hdd & dvd recorder
Table of Contents

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Circuit Diagrams and PWB Layouts
Digital: 1394
1
2
3
+3V3_IEEE_A
52
51
A
3283
10K
not used
I207
3205
40
R0
I208
6K34
1%
41
R1
VOLTAGE
I209
2200
38
TPBIAS0
1203
1u0
CURRENT
SR
GENERATOR
6
B
5
F1205
37
4
TPA0+
F1204
3
F1203
F1202
36
2
TPA0-
F1201
1
35
TPB0+
34
TPB0-
C
59
XI
XTAL OSC.
F203
60
XO
PLL
CLOCK
16
43
TRANSMIT
44
DATA
45
ENCODER
1201
3253
NC
46
D
1R0
24M576
CX-8045G
47
2204
54
PDI1394P25
100n
2205
55
100n
not used
28
29
50
E
F
5200
I201
+3V3_IEEE_PLL
BLMP18P
5202
I202
+3V3_IEEE_A
BLMP18P
G
I203
5203
+3V3_IEEE_D
+3V3
BLMP18P
H
5204
I204
+3V3
I
BLMP18P
1394
1
2
3
3139 785 31681
4
5
6
+3V3_IEEE_PLL
+3V3_IEEE_D
+3V3_IEEE_D
+3V3_IEEE_D
2235
1n0
7200
42
31
30
27
62
61
26
25
56
PDI1394P25
TESTM
PLLVDD
AVDD
DVDD
I215
24
CPS
15
LPS
RECEIVED
BIAS
23
DATA
ISO_
+3V3_IEEE_D
DECODER/
I216
19
C|LKON
AND
TIMER
2
SYSCLK
1
LREQ
3216
4
LINK
CTL0
INTERFACE
10R
5
CTL1
3223
6
D0
10R
7
D1
3228
D2
8
ARBITR'N
AND
10R
D3
9
CONTROL
3234
STATE
D4
10
MACHINE
10R
D5
11
LOGIC
12
3238
D6
10R
13
D7
20
3245
PC0
10R
21
PC1
3204
22
PC2
+3V3_IEEE_D
I213
10K
3
CNA
4201
MPIO8_1394_CNA
I214
53
RESET_
4202
14
PD
AGND
DGND
PLLGND
49
48
39
33
32
64
63
18
17
58
57
PHY
+5V
not used
MPIO2_1394_IRQn
3276
+3V3_LINK
1K0
7202
PDTC144EU
MPIO23_1394_LED
4
5
6
7.
EN 162
7
8
9
10
+3V3_IEEE_D
+3V3_LINK
not used
3284
I217
1R0
+3V3_LINK
3209
1R0
3220
82
PHYD0
81
PHYD1
10R
I211
80
PHYD2
79
I212
PHYD3
3225
76
PHYD4
75
PHYD5
10R
I218
12KB BUFFER
74
PHYD6
73
PHYD7
MEMORY
I219
3231
86
PHYCTL0
85
PHYCTL1
I222
LINK
10R
87
LREQ
LREQ
ISOCH & ASYNC
CORE
88
SCLK
I225
3236
PACKETS
91
LPS
56
CYCLEIN
I226
10R
F201
57
CYCLEOUT
55
CLK50
I227
3242
47
1394MODE
48
PD
10R
92
LINKON
93
ISON
3248
+3V3_LINK
22R
42
RESET_
CONTROL
AND
49
STATUS
1
50
2
REGISTERS
51
3
52
4
58
5
59
6
72
7
71
ASYNC
8
104
9
TRANSMITTER
65
10
66
AND
11
67
RECEIVER
12
68
13
105
14
129
15
144
16
130
17
PCI_AD(31:0)
220R
22
HIFAD0
PCI_AD(24)
3297
21
HIFAD1
PCI_AD(25)
3298
220R
PCI_AD(26)
3299
220R
20
HIFAD2
19
HIFAD3
PCI_AD(27)
3315
220R
220R
16
HIFAD4
PCI_AD(28)
3316
PCI_AD(29)
3317
220R
15
HIFAD5
+3V3_LINK
PCI_AD(30)
3318
220R
14
HIFAD6
PCI_AD(31)
3319
220R
13
HIFAD7
3262
4K7
10
HIFD8
8-BIT
3263
4K7
9
HIFD9
INTERFACE
3264
4K7
8
HIFD10
3265
4K7
7
HIFD11
3266
4K7
4
HIFD12
3267
4K7
3
HIFD13
3268
4K7
2
HIFD14
3269
4K7
1
HIFD15
3273
10R
I224
38
HIFINT_
41
HIFWAIT
+3V3_LINK
7
8
9
10
11
12
13
LINK
7201
PDI1394L40
VDD
108
AV1D0
3210
33R
F213
L_D(0)
109
AV1D1
3211
33R
F212
L_D(1)
110
F211
L_D(2)
AV1D2
3214
33R
111
AV1D3
3215
33R
F210
L_D(3)
114
AV1D4
3217
33R
F209
L_D(4)
AV1D5
115
F208
L_D(5)
3218
33R
AV1D6
116
F207
L_D(6)
3221
33R
AV1D7
117
F206
L_D(7)
3222
33R
AV1CLK
99
F215
L_CLK
3224
82R
AV1FSYNC
100
F204
L_FSYNC
3229
33R
AV1VALID
102
F205
L_VAL
3227
33R
AV1SY
101
10K
F217
3235
AV1SYNC
103
F214
L_SYNC
3226
33R
AV1ENDPCK
98
10K
AV1ENDPCK
3230
AV1ERR0
96
F216
AV1ERR1
97
AV1READY
118
F200
3219
10K
+3V3_LINK
AV2D0
133
3237
33R
MX_D(0)
AV2D1
134
3239
33R
MX_D(1)
AV2D2
135
3241
33R
MX_D(2)
AV2D3
136
3243
33R
MX_D(3)
AV2D4
139
3244
33R
MX_D(4)
140
AV2D5
3246
33R
MX_D(5)
AV2D6
141
3247
33R
MX_D(6)
AV2D7
142
3249
33R
MX_D(7)
124
MX_CLK
AV2CLK
3251
33R
125
AV2FSYNC
3255
4K7
127
AV2VALID
3254
33R
MX_VAL
AV2SY
126
3259
4K7
128
AV2SYNC
3252
33R
MX_SYNC
123
AV2ENDPCK
3256
4K7
AV2ERR0|LTLEND
121
3257
22K
AV2ERR1|DATINV
122
3258
22K
AV2READY
143
3250
4K7
+3V3_LINK
62
1
63
TESTPIN
2
64
3
HIFA0
33
3202
220R
PCI_AD(0)
HIFA1
32
220R
PCI_AD(1)
3260
HIFA2
31
PCI_AD(2)
+3V3_LINK
3274
220R
HIFA3
30
3277
220R
PCI_AD(3)
HIFA4
29
3278
220R
PCI_AD(4)
HIFA5
28
3279
220R
PCI_AD(5)
PCI_AD(6)
HIFA6
27
3294
220R
HIFA7
26
3295
220R
PCI_AD(7)
HIFA8
25
3296
220R
PCI_AD(8)
HIFSC_
36
I223
3272
220R
I220
HIFWR_
37
3270
220R
HIFALE
39
I221
HIFRD_
40
3271
220R
45
HIF16BIT
HIFMUX
46
4203
+3V3_LINK
not used
GND
4204
I205
+3V3
BOARD_ID
MPIO9_BOARD_ID_0
MPIO10_BOARD_ID_1
MPIO11_HDMI_RESETn
MPIO12_HDMI_IRQ
3103_603_30601_a2_sh130_sh2.pdf
11
12
13
1201 D1
3289 H13
14
1203 B1
3290 I13
2200 B2
3291 I13
2201 C2
3292 I13
2202 D1
3293 I13
2203 D2
3294 F12
2204 D2
3295 F12
2205 D2
3296 F12
2206 G3
3297 E8
2207 F2
3298 F8
2208 G3
3299 F8
2209 G2
3314 F13
2210 G2
3315 F8
A
2212 H1
3316 F8
2214 H2
3317 F8
2215 H2
3318 F8
2217 I2
3319 F8
2218 I2
4201 D6
2219 I2
4202 D6
2220 I2
4203 G12
2221 I3
4204 G12
2222 I3
4205 A4
2223 I3
5200 F2
2224 I4
5201 F4
2225 I4
5202 G2
B
2226 I4
5203 H2
2227 I4
5204 I1
L_D(7:0)
2228 I5
6200 G4
2229 I5
7200 A5
2230 I5
7201 B12
2231 I6
7202 H5
2232 I6
F1201 B2
2233 I6
F1202 B2
2234 I6
F1203 B1
2235 A5
F1204 B2
2236 A9
F1205 B2
2237 B6
F200 C12
3200 E6
F201 C9
C
3202 F12
F203 C3
3203 H5
F204 C13
3204 D6
F205 C12
3205 A2
F206 C13
L_D_CTL
3206 A7
F207 C12
3207 A8
F208 C12
3208 B7
F209 C12
3209 B8
F210 C13
3210 B12
F211 B12
MX_D(7:0)
3211 B12
F212 B12
3212 B2
F213 B12
3213 B3
F214 C12
3214 B12
F215 C12
D
3215 C12
F216 C12
3216 B7
F217 C12
3217 C12
I200 H4
3218 C12
I201 F2
MX_D_CTL
3219 C12
I202 G2
3220 B7
I203 H2
3221 C12
I204 I2
3222 C12
I205 G11
3223 B7
I206 G4
3224 C12
I207 A3
3225 B7
I208 A3
3226 C12
I209 B3
3227 C12
I210 C2
E
3228 C7
I211 B7
3229 C12
I212 B7
3230 C12
I213 D6
3231 C7
I214 D6
3232 C2
I215 A6
PCI_AD(31:0)
3233 C2
I216 B6
3234 C7
I217 A8
3235 C12
I218 C7
3236 C7
I219 C7
3237 D12
I220 F12
3238 C7
I221 F12
3239 D12
I222 C7
F
3240 C2
I223 F12
3241 D12
I224 G8
3242 C7
I225 C7
3243 D12
I226 C7
XIO_SEL1
3244 D12
I227 C7
PCI_CBE(1)
3245 C7
3246 D12
PCI_CBE(2)
3247 D12
3248 D7
3249 D12
3250 E12
3251 D12
3252 E12
G
3253 D2
3254 E12
3255 E12
3256 E12
3257 E12
3258 E12
3259 E12
3260 F12
3261 E3
3262 F7
3263 F7
3264 F7
3265 F7
H
3266 F7
3267 F7
3268 F7
3269 G7
3270 F12
3271 F12
3272 F12
3273 G8
3274 F12
3275 G4
3276 G7
3277 F12
3278 F12
I
3279 F12
3280 A6
3281 A7
3282 A8
3283 A2
3284 A8
3285 A6
2004-12-01
3286 H13
3287 H13
3288 H13
14

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