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CPLD Header
The Complex Programmable Logical Device (CPLD) header is located on JP2 on the
motherboard. Connect an appropriate cable to use this feature.
BMC SMB (I
C) Header
2
A System Management Bus (SMBus) header for IPMI 2.0 is located at JIPMB1. Connect an
appropriate cable here to use the IPMB I
below for pin definitions.
I-SATA0~3
JL1
GPU PWR1
CPU2
FAN8
FAN6
C connection on your system. Refer to the table
2
External I
Pin Definitions
Pin#
Definition
1
Data
2
Ground
3
Clock
4
No Connection
VGA
COM1
USB0/1(3.0)
2
LEDM1
IPMI_LAN
BMC
BIOS
JSDCARD1
1
BATTERY
JBT1
JRK1
BT1
PCH
SP1
I-SATA4~7
JSD2
JSD1
JS1
JS2
USB2(3.0)
JHFI2
NVME12
NVME13
LE2
GPU PWR2
LICENSE
IPMI CODE
BAR CODE
X11DPU-Z+
REV:1.01
FAN5
55
C Header
2
1. CPLD Header
2. BMC SMBus Header
PSU1
PSU2
JPW4
JNVI2C1
JHFI1
NVME11
BIOS
JPW3
CPU1
Chapter 2: Installation
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