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If an error condition occurs during the loading of the
individual modules making up the RBM overlays, the fol-
lowing message is output:
where
xx
xx ERR, ID:yy
RETRY?
is one of the following error types:
xx
Error Type
TY
Item type; no external references or
definitions are allowed.
BI
Binary module is incomplete.
OG
Origin error; an attempt has been made
to re-origin a portion of the routine to
a region already on the disk.
LG
length; the specified overlay is longer
than the overlay region (512 words).
yy
is the ident of the current module.
The response to the RETRY query can be either N (no) or
Y (yes). If the response is N, phase 2 skips to the next
module.
If Y is input, the current module is left as is and
an attempt is made to continue with the next record.
For
some of the above errors, however, continuing in this man-
ner may be undesirable.
After loading of the RBM overlays, phase 2 determines if
all required modules are present.
If some modules are
missing, the following alarm is typed:
MISSING IDENTS: xx xx xx xx ...
RETRY?
where xx is the ident of the missing module.
If
Y is input to the RETRY query, SYSlOAD again reads
the input device to load the missing modules. The operator
must, in this case, rewind or reload the module-input de-
vice. This sequence is repeated until all required modules
are loaded or until an N is input.
After the overlays have been loaded, SYSlOAD will
output
RBM lWA
=
+xxxx
where xxxx is the lowest address that may be used for the
public library FWA, resident foreground FWA, or non-
resident foreground FWA. If any of the memory partitioning
parameters are inval id, a message so indicating is issued
at this point.
The SYSGEN must be completely redone in
this case.
40
Definition-Phase Operation
RBM SYMBOL MAP
If the memory partitioning parameters were valid, a map
of all defined symbols is printed on the SYSGEN output
device.
The format of the map is
RBM SYMBOLS
[U] symbo I
address
symbol
address
(in alphabetic order)
(i n numeri corder)
where
symbol
is an external -definition symbol (EBCDIC).
address
is the hexadecimal memory address defined
by the symbol, or the address at which it is refer-
enced if it is not defined.
If a symbol appearing on the map is undefined, which may
be caused by an unsatisfied reference in a user-written
module or by the absence ofa standard module, the letter U
appears before the symbol. After the symbol map is output,
DATA switch 1 is tested to determine whether any patches
are required (see SYSlOAD PA option).
Following patch
input, if any, entries are made in the System Processor area
fi Ie directory for RBM, the Transfer Vector Table, and the
RBM bootstrap.
Each of these items is assigned a separate
file in the System area (see Table 9, in Chapter 3).
After the nonresident portion of the RBM is written in the
RBM fi Ie, the resident portion is written, and then the
Transfer Vector Table is written into the TVECT file.
The
Transfer Vector Table contains transfer vectors for monitor
service routines and Public library routines.
The final program output to the System Processor area is a
copy of the RBM bootstrap, written into the BOOT fi Ie
and on sector zero of the system disk, from where it can be
hardware-loaded into core. Also, a copy of the bootstrap
may be output to the foreground BO device, which enables
the user to start RBM on any sector of the RA D or to boot
from a disk pack.
If the user chooses to start RBM at any
sector other than sector zero, he can reboot RBM on Iy by
loading the bootstrap punched on the BO device.
The next output to the RAD wi" be the System Data area
file directory, which contains the files itemized in Table 9.
If
the installation does not wish to retain the standard
SD area file allocations as defined in Table 9, reallocation
via the RAD Editor may be performed as described in
Chapter 6. Note that the RBM Symbol Table (fi Ie RBMSYM)
contains the definitions (DEFs) for the monitor service rou-
tines.
These DEFs are needed by the Overlay loader
at load time to satisfy any reference to the monitor servi ce
routines.
When the system load phase completes its writing of the
SD area, it transfers control to the RBM bootstrap, which
goes through its normal loading procedure (as described in
Chapter 11 of the RBM/RT,BP Reference Manual, 90 10 37).
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