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Tektronix SPG8000A Instructions Manual page 8

Master sync / clock reference generator declassification and security instructions
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Clear and sanitize procedures
Table 1: Volatile memory devices for the SPG8000A base generator (cont.)
Type and
minimum
size
Function
volatile
5M240ZTQFP100
CPLD
keypad
read-back
and LED
drive control
registers
Real Time
The RTC
Clock +
function is not
128x8 serial
accessible
NV memory
but the clock
runs and
will show
the elapsed
time since the
board was
built. The
memory is
used to store
user network
parameters.
FPGA
Used to store
EP2C5F256C7N
instrument
settings
with internal
registers
FPGA
Used to store
EP2C35F672C6N
instrument
with internal
settings
registers
ACS9521
Used to
SoC with
process
internal FPGA,
all PTP
Processor
messages
RAM and
ROM
1
7 port Ethernet
Used to
Switch
process all
88E6321
1
PTP Ethernet
traffic
1
Device is installed in all instruments but is operationally enabled only with Option PTP.
2
Type
of
Backed
Method
user
up by
of
data
battery
modification
No
Indirectly
Settings
Data
Yes
Direct
and
and
settings
indirect
Settings
No
Indirectly
Settings
No
Indirectly
Settings
No
Indirectly
Settings,
No
Indirectly
data
Data
input
User
method
Location
accessible
UI or
Yes
Front panel /
remote
U1
UI or
Main / U16
Yes
remote
UI
GPS/Genlock/Black
No
board, U432
UI
GPS/Genlock/Black
No
board, U732
UI or
PTP board, U3
No
remote
UI,
PTP board, U4
No
remote
or
Ethernet
SPG8000A Declassification and Security Instructions
To
To clear
sanitize
Repeat
Set power
on preset to
clear
process
factory, cycle
power.
three
times.
Perform
Remove
the clear
part or
network
battery.
settings
procedure.
There is no
way to clear
the real time
clock.
Restore
Disconnect
factory
inputs
settings
then
Restore
factory
settings
three
times
Restore
Disconnect
factory
inputs
settings
then
Restore
factory
settings
three
times
Restore
Disconnect
factory
inputs
settings
then
Restore
factory
settings
three
times
Restore
Disconnect
factory
inputs
settings
then
Restore
factory
settings
three
times

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