Advantech PCA-6743 User Manual page 7

Dm&p vortex86dx-800mhz soc, isa half-size sbc, ttl, 10/100 ethernet, cfc, on board memory
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Chapter
3
3.1
3.2
Appendix A
A.1
A.2
A.3
A.4
A.5
A.6
A.7
A.8
A.9
A.10
A.11
Appendix B
B.1
Appendix C
C.1
C.2
C.3
C.4
PCA-6743 User Manual
BIOS Introduction.................................................................................... 28
BIOS Setup ............................................................................................. 28
3.2.1
Main Menu .................................................................................. 29
3.2.2
Standard CMOS Features .......................................................... 30
3.2.3
Advanced BIOS Feature............................................................. 31
3.2.4
Advanced Chipset Features ....................................................... 32
3.2.5
Integrated Peripherals ................................................................ 34
3.2.6
PnP/PCI Configurations.............................................................. 37
3.2.7
PC Health ................................................................................... 38
3.2.8
Load Optimized Defaults ............................................................ 38
3.2.9
Set Password.............................................................................. 39
3.2.10 Save & Exit Setup....................................................................... 40
3.2.11 Quit Without Saving .................................................................... 41
Pin
Assignments............................... 43
Front Panel Connectors (JFP1) .............................................................. 44
Table A.1: Front Panel Connectors (JFP1)................................ 44
USB Ports (USB12 & USB34)................................................................. 44
Table A.2: USB Ports (USB12 & USB34) .................................. 44
Serial Ports (COM2)................................................................................ 45
Table A.3: Serial Ports (COM2) ................................................. 45
Serial Ports (COM34).............................................................................. 45
Table A.4: Serial Ports (COM34) ............................................... 45
PS/2 Keyboard / Mouse connector (KBMS2).......................................... 46
Table A.5: PS/2 Keyboard / Mouse connector (KBMS2) ........... 46
Front Panel LAN Indicate connector (LANLED1).................................... 46
Table A.6: Front Panel LAN Indicate connector (LANLED1) ..... 46
System FAN connector (SYSFAN1) ....................................................... 46
Table A.7: System FAN connector (SYSFAN1)......................... 46
GPIO Header (GPIO1)............................................................................ 47
Table A.8: GPIO Header (GPIO1) ............................................. 47
TTL TFT LCD connector (LCD1) ............................................................ 47
Table A.9: TTL TFT LCD connector (LCD1).............................. 47
LVDS TFT LCD connector (LVDS1) ....................................................... 48
Table A.10:LVDS TFT LCD connector (LVDS1)......................... 48
Inverter power connector (INV1)............................................................. 48
Table A.11:Inverter power connector (INV1) .............................. 48
Introduction ............................................................................................. 50
B.1.1
Watchdog timer overview ........................................................... 50
B.1.2
Programming the Watchdog Timer............................................. 50
B.1.3
Example Program ....................................................................... 51
System
Assignments........................ 53
System I/O ports ..................................................................................... 54
Table C.1: System I/O ports....................................................... 54
DMA Channel assignments .................................................................... 55
Table C.2: DMA Channel assignments...................................... 55
Interrupt assignments ............................................................................. 55
Table C.3: Interrupt assignments............................................... 55
1st MB Memory map............................................................................... 56
vi
................................. 27
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