Sony STR-DA5500ES Service Manual Digest page 137

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Pin No. Pin Name
H14 DPDVBCK
J1, J2 AD5, AD4
J4 to J6,
J9 to J11
J13
J14 DPDVLRCK
K1
K2
K4 to K6,
K9 to K11,
K13
K14
L1, L2 AD2, AD1
L4 to L6,
L9 to L11,
L13
L14
M1
M2
M3, M12
M13
M14
N1
TE
N2
L 13942296513
N3
N4
N5
N6
N7
N8
N9
N10
N11, N12
N13
N14
P1 to P6 AD14 to AD9
P7
P8
P9 SF2_DSP2_MAS
P10
P11
P12
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P13
.
P14
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I/O
Bit clock signal output for digital audio signal output to the lip sync adjust
(US and Canadian models)
O
Bit clock signal output for digital audio signal output to the fi eld programmable gate array
(AEP and UK models)
I/O Two-way data bus with S-RAM and address signal output to the address latch
GND - Ground terminal
VDDINT - Power supply terminal (+1.2V)
L/R sampling clock signal output for digital audio signal output to the lip sync adjust
(US and Canadian models)
O
L/R sampling clock signal output for digital audio signal output to the fi eld programmable
gate array (AEP and UK models)
AD3 I/O Two-way data bus with S-RAM and address signal output to the address latch
VDDINT - Power supply terminal (+1.2V)
GND - Ground terminal
DPSIE I Digital audio signal (for surround back L/R) input from the DSP1
I/O Two-way data bus with S-RAM and address signal output to the address latch
GND - Ground terminal
DPSID I Digital audio signal (for center, subwoofer) input from the DSP1
AD0 I/O Two-way data bus with S-RAM and address signal output to the address latch
WR O Data write enable signal output to the S-RAM
GND - Ground terminal
DPSIB I Digital audio signal (for front L/R) input from the A/D converter, HDMI receiver or DSP1
DPSIC I Digital audio signal (for surround L/R) input from the DSP1
AD15 O Address signal output to the S-RAM and address latch
ALE O Address latch enable signal output to the address latch
RD O Data read enable signal output to the S-RAM
VDDINT - Power supply terminal (+1.2V)
VDDEXT - Power supply terminal (+3.3V)
AD8 O Address signal output to the S-RAM and address latch
VDDINT - Power supply terminal (+1.2V)
DAI_P2 - Not used
VDDEXT - Power supply terminal (+3.3V)
DAI_P4 I Digital audio signal input from the DSP1
VDDINT - Power supply terminal (+1.2V)
GND - Ground terminal
DPSOE O Digital audio signal output terminal
O Address signal output to the S-RAM and address latch
DAI_P1 O Address signal output to the S-RAM
DAI_P3 - Not used
O Master/slave mode selection signal output terminal
Digital audio signal (for front L/R) output to the lip sync adjust (US and Canadian models)
DPSOA O Digital audio signal (for front L/R) output to the fi eld programmable gate array
(AEP and UK models)
Digital audio signal (for surround L/R) output to the lip sync adjust
(US and Canadian models)
DPSOB O
Digital audio signal (for surround L/R) output to the fi eld programmable gate array
(AEP and UK models)
Digital audio signal (for center, subwoofer) output to the lip sync adjust
(US and Canadian models)
DPSOC O
Digitalaudio signal (for center, subwoofer) output to the fi eld programmable gate array
(AEP and UK models)
Digital audio signal (for surround back L/R) output to the lip sync adjust
(US and Canadian models)
x ao
DPSOD O
y
Digital audio signal (for surround back L/R) output to the fi eld programmable gate array
(AEP and UK models)
i
DPSIA I Digital audio signal input from the DSP1
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3 6 7 1 3
Not used
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STR-DA5500ES
2 9 9 4 2 8
Description
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