Sony STR-DA5500ES Service Manual Digest page 132

STR-DA5500ES
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Pin No. Pin Name
55 ERR
56 GND
57 MIDDLE
58 EMPTY
59 FULL
60 -
61 GND
62 VCCINT
63 -
64 MODE
65 MUTE
66 VCCIO4
67 OUTPUTEN
68 GND
69 MEMCLR
70 TXSTART
71 RXSTART
72 SDA
73 BA1
74 BA0
75 INIT_DONE
76 XCS
77 VCCIO3
78 GND
79 XRAS
TE
L 13942296513
80 XCAS
81 XWE
∗nSTATUS
82
∗CONF_DONE
83
∗MSEL1, ∗MSEL0
84, 85
86 LDQM
87 -
88 SCL
89 -
90 SYSCLK
91 -
92 to 94 A0 to A2
95 VCCIO3
96, 97 A3, A4
98 GND
99 to 101 A5 to A7
102 VCCIO3
103, 104 A8, A9
105 GND
106 GND_PLL2
107 VCCD_PLL2
108 GND_PLL2
109 VCCA_PLL2
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110 GNDA_PLL2
111 GND
112 A10
.
113 A11
114, 115 D0, D1
116 VCCIO2
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I/O
- Not used
- Ground terminal
O Middle detection signal output to the system controller
O Not used
O Not used
- Not used
- Ground terminal
- Power supply terminal (+1.2V)
- Not used
I Not used
I Muting on/off control signal input from the system controller
- Power supply terminal (+3.3V)
I Not used
- Ground terminal
I Not used
I Not used
I Not used
Two-way I2C data bus with the D/A converter (for audio section), system controller and video
I/O
input selector
O Bank address signal output terminal
O Bank address signal output to the SD-RAM
- Not used
O Chip select signal output to the SD-RAM
- Power supply terminal (+3.3V)
- Ground terminal
O Row address signal output to the SD-RAM
O Column address signal output to the SD-RAM
O Write enable signal output to the SD-RAM
- Confi guration status terminal
O Confi guration status output terminal
I Mode setting terminal
O Data mask signal output to the SD-RAM (lower byte)
- Not used
Two-way I2C clock bus with the D/A converter (for audio section), system controller and
I/O
video input selector
- Not used
I System clock (22.5792 MHz) signal input terminal
- Not used
O Address signal output to the SD-RAM
- Power supply terminal (+3.3V)
O Address signal output to the SD-RAM
- Ground terminal
O Address signal output to the SD-RAM
- Power supply terminal (+3.3V)
O Address signal output to the SD-RAM
- Ground terminal
- Ground terminal (for PLL)
- Power supply terminal (+1.2V) (digital system) (for PLL)
- Ground terminal (for PLL)
- Power supply terminal (+1.2V) (analog system) (for PLL)
- Ground terminal (analog system) (for PLL)
- Ground terminal
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O Address signal output to the SD-RAM
i
O Address signal output terminal
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+3.3V)
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2 9
8
Description
"H": middle
Not used
Q Q
3 6 7 1 3 1 5
Not used
co
.
Not used
9 4 2 8
"H": muting on
0 5 8 2 9 9 4 2 8
m
9 9
9 9