Sony DSR-DR1000 Service Manual page 122

1
020 NCG_COM
from FPGA
SDIP_BUS
003,004,008
020,028
NPSCK
NPSSO
R301
EXTH
R302
EXTF
013,029
NSG_CK13D
2
029 NSG_VD
029 NSG_HD
3
4
5
A B
NCGPCS
10
10
10 76
R303
CLOCK
R304 22 77
ANA_SDI_SYNC_SEL
78
R305 22
EXT_HSYNC
79
EXT_VSYNC
R306 80
SEL_N_P
81
0
REFF
82
REFH
83
SI
84
SCK
85
CS
86
C301
TEST_RAM1
0.1uF
87
TEST_RAM0
88
OCL3
89
VDDCORE4
90
VD9
91
VD8
92
VD7
93
VD6
94
VD5
95
VD4
96
VD3
97
VD2
98
VD1
99
VD0
100
CK27
GND
C
DPR-224 (3/29) DPR-224 (3/29)
C302
0.1uF
C304
C305
47uF
0.1uF
16V
50
EXT_FONT10
49
EXT_FONT9
48
EXT_FONT8
47
EXT_FONT7
46
EXT_FONT6
45
EXT_FONT5
44
EXT_FONT4
43
EXT_FONT3
42
EXT_FONT2
41
EXT_FONT1
40
C306
EXT_FONT0
0.1uF
39
VSSCORE2
38
IC301
TDO
CXD9125R
37
SIVD9
36
SIVD8
NCG
35
VSSOUT2
34
SIVD7
33
SIVD6
32
SIVD5
31
SIVD4
30
VSSOUT1
29
SIVD3
28
SIVD2
27
SIVD1
26
SIVD0
R310
10k
NM
R309
C303 R307
10k
0.1uF 10k
NM
NM
R308
10k
NM
028 NCG_RESET
10-12 10-12
D E
+3.3V
L301
10uH
RB301
22
1 2
012 DSP_1/2OUT
3 4
012 DSP_3/4OUT
5 6
009,029 SDIP_512FS
7 8
029 SDIP_128FS
RB302
1 2
009,010,012,029 SDIP_BCK
RB302
3 4
009,010,012,029 SDIP_LRCK
001,029 V_OUT
RB302
V_OUT_DT0 5 6
RB302
V_OUT_DT1 7 8
RB303
V_OUT_DT2 1 2
3 4
V_OUT_DT3
V_OUT_DT4 5 6
7 8
V_OUT_DT5
RB304
V_OUT_DT6 1 2
3 4
V_OUT_DT7
V_OUT_DT8 5 6
V_OUT_DT9 7 8
RB305
1 2
029 NSG_OFOE
3 4
029 NSG_FH
5 6
013,029
NSG_CK27D
7 8
029
NCG_FRAME
to FPGA
NCG_CHARA 029
F
AESP_BUS 006,008
AUPDT12
AUPDT34
P512FS
CL301
22 (1/4)
P64FS
22 (2/4)
PFS
SDIP_BUS
003,004,008
22 (3/4)
SDIPDTI0
22 (4/4)
SDIPDTI1
22
SDIPDTI2
SDIPDTI3
SDIPDTI4
SDIPDTI5
22
SDIPDTI6
SDIPDTI7
SDIPDTI8
SDIPDTI9
22
EXTF
EXTH
SDIPCK27
DPR-224 (3/29)
BOARD NO. 1-686-170-12
DSR-DR1000_DPR-224_012_3
DSR-DR1000/DR1000P
G H