Misc_Config (Reg 18) - Connect Tech Multi-I/O User Manual

Connect Tech - Xtreme/Multi-I/O - Users Guide

MISC_CONFIG (Reg 18)

This register is a collection of configuration settings that affect
Power-up default value for this register (all bits zero) implements these default settings:

Port #8 is routed to microcontroller.

CAN clock is 16 MHz.

PIC32 is NOT reset.

Module Sockets are NOT reset.

Serial Port #5 is in RD485, Full Duplex mode, no termination.

Uart Ports 1 to 5 have their DSR signal disconnected from their respective DTR.

Uart clock is 14.7456 MHz.
Control Item
P8_MT
CAN_CLK
PIC32_RST
MOD_RST
P5_HD
P5_RX_ONLY
P5_TERM_EN
P5_J1708
DTR_DSR_WRAP 6  2
UART_CLK
Document: CTIM-00116
Revision: 0.02
Bit Comment(s)
Offset
15 0= Uart Port #8 is routed to microcontroller (PIC32), default
1= Uart Port #8 is routed to GPIO of Module Socket #2
The routing is the Serial TX and RX signals only.
14 CAN Clock selection
0= 16 MHz
1= 24 MHz
13 1= PIC32 Reset applied
0= Reset released
Reset of the PIC32 can also be activated via the Board Control register
12  11
0= Module Reset applied
1= Reset released
Bit-12 = Module #1 (Uart Port-6)
Bit-11 = Module #2 (Uart Port-7)
Reset of the Modules can also be activated via the Board Control register
10 1= Port 5 operated in RD485 (Half duplex) mode
9 1= Port 5 operated in Receive only
(Line Driver of the Isolated line transceiver, is held Tri-stated).
8 1= Port 5 Termination enabled
(120 ohm load in the Line Driver of the Isolated line transceiver, is enabled)
7 1= Enable J1708 operation.
Port-5 is disconnected from the Uart and is connected to the J1708 Port within the
FPGA.
Setting this bit overrides the all other Port-5 settings (in this register).
1= Uart DTR signal is wrapped back to DSR, for Uart Ports 1 to 5
Bit-6 = Uart Port-5
Bit-5 = Uart Port-4
Bit-4 = Uart Port-3
Bit-3 = Uart Port-2
Bit-2 = Uart Port-1
1  0
Uart Clock Selection
00 = 14.7556 MHz
01 = 7.3728 MHz
10 = 3.6864 MHz
11 = 1.8432 MHz
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0.02
Date: Apr. 14, 2015