Rx Eom Level Register (Offset: 0X06); Rx Almost Full Level Register (Offset: 0X07) - Connect Tech Multi-I/O User Manual

Connect Tech - Xtreme/Multi-I/O - Users Guide

RX EOM Level Register (Offset: 0x06)

As described in the Receiver section above, this register sets the number of Bus Idle intervals that are desired
to cause an RX EOM interrupt.
Control Item
RX EOM Level value
Unused

RX Almost Full Level Register (Offset: 0x07)

As bytes enter the Receiver FIFO they are counted. When the count reaches the threshold set in this register,
the
RX FIFO Almost Full
the reception of a message.
Control Item
RX Almost Full Level value
Unused
Software Implementation Notes:
The range of values for this register seems a little low, considering that the FIFO is 512 bytes deep. But it's
been setup this way because most J1708 messages are relatively short. This value should be set to
correspond to the typical (or average) received message length.
Using the
RX FIFO Almost Full
exclusively in many applications.
Document: CTIM-00116
Revision: 0.02
Bit Comment(s)
Offset
0  3
Values of 0 to 15, although a value lower that 3 would probably give false EOM
interrupts.
Default value is 6.
4  7
Not used
interrupt is generated. This allows software to empty the data FIFO periodically during
Bit Comment(s)
Offset
0  4
Values of 1 to 31.
Writing a value of zero will be ignored, and the current value will be retained.
Default value is 16.
5  7
Not used
interrupt is somewhat optional, the
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interrupt could be used
RX EOM
Date: Apr. 14, 2015