Configuration Commands; Memory Vs Io Spaces; Memory Space; I/O Space - Connect Tech Multi-I/O User Manual

Connect Tech - Xtreme/Multi-I/O - Users Guide

Configuration Commands

Memory vs IO Spaces

The first decision to make when configuring this board, is to determine whether the board will operate within
the Memory or I/O address Space of the computer system in which the board is installed. First, a quick
description of the two different Spaces.

Memory Space

Most (but not all) PC/104 CPU System board vendors provide one or more regions of Memory Addresses that
can be configured (or allocated) to the PC/104 Expansion bus connector(s) on CPU System board. This setup
may be performed via the BIOS setup or via jumpers or switches on the System board. This memory region is
usually located at addresses below the 1-Meg CPU memory address (commonly referred to as the Upper
Memory addresses), although some System boards allow the PC/104 Expansion Bus to be allocated to blocks of
addresses within the first 16-Meg of memory.

I/O Space

This region is supported by all PC/104 CPU System board vendors, and commonly consists of I/O Addresses
from 0x000 to 0x3FF, although some System boards support I/O addresses beyond 0x3FF, some even support
the full 16 bit IO range (0x0000 to 0xFFFF). (Note: Some I/O mapped PC/104 expansion boards only decode
the lowest 10 bits of the I/O address, therefore these boards restrict the usable I/O space to 0x3FF).

Board Address Decoding Capabilities

All the ports (Uart, CAN, J1708) of this board can be setup to reside in either IO or MEMORY space.
However, in most situations the Uart Serial Ports will be setup in IO space due to software limitations, and the
CAN Ports in MEMORY space because the SJA1000 devices have too many registers to fit easily in IO space.
The J1708 Port could be in either IO or MEMORY space as desired.

Command Groups

Group
Serial Ports (UARTS)
Serial Ports Enable / Disable
Serial Port Clocking
Serial Port DTR  DSR
Wrapback
RS422/485 Port Settings
CAN Ports (SJA1000)
CAN Ports Clocking
Board Configuration
J1708 Configuration
Misc Configuration
Testing / Debugging
Document: CTIM-00116
Revision: 0.02
Comment(s)
Commands that set, or show, the Base Address (IO or Memory) or the IRQ assignments of
the UART Serial Ports.
Commands that allow individual serial ports to be Enabled or Disabled.
Commands that select, or show, a clock source for all Uart Serial Ports.
Commands that setup, or show the DTR to DSR wrapback on the chosen Port.
Commands that setup and show the RS422/485 Port settings.
Commands that set, or show, the Base Address (IO or Memory) or the IRQ assignments of
the CAN Ports.
Commands that select, or show, a clock source for the CAN Ports.
Commands to set, show the Base IO Address for the Board Control/Status Register.
Commands to set, show the Base Address (IO or Memory) or the IRQ assignments of
J1708 Port.
Command to set, show a variety of miscellaneous settings.
Commands that are used to test/debug the SPI interface between the PIC32 and FPGA.
Mainly used by software developers.
Page 14 of 50
Connect Tech Inc. Proprietary Information 0.02
Date: Apr. 14, 2015