Board Control/Status Registers; Intr_Stat Register (Offset 0X00, Read-Only); Reset_Cont Register (Offset 0X00, Write-Only); Pc104 Bus Test - Connect Tech Multi-I/O User Manual

Connect Tech - Xtreme/Multi-I/O - Users Guide

Board Control/Status Registers

Implemented in the FPGA is 2 registers which assist with the operation of the board. The Base PC/104
IO-Address for these registers is defined by the BP= command.
Register
INTR_STAT
RESET_CONT Reset Control
LED_CONT

INTR_STAT Register (Offset 0x00, read-only)

Software can use the Interrupt Status register to determine which interrupts are active. All bits are
"active-high".
Control Item
Offset
Uart Group-1
Uart Group-2
CAN Port-1
CAN Port-2
J1708 Port
5  7
Unused

RESET_CONT Register (Offset 0x00, write-only)

Software can use the Miscellaneous Control register to reset various circuits on the board. Writing a "1" to the
respective bit, will hold the reset on the respective circuit.
Control Item
PIC32_RST
Uart Group-1_RST
Uart Group-2_RST
CAN Port-1_RST
CAN Port-1_RST
Module-1_RST
Module-2_RST
BUS_TEST

PC104 Bus Test

This bit enables a mode where the PC104 Address Bus signals can be confirmed as functioning. This bit
should be set to zero for normal operation of the board.
Document: CTIM-00116
Revision: 0.02
Function
Interrupt Status 0x00 (read-only)
0x00 (write-only)
LED Control 0x01 (write-read)
Bit Bit Comment(s)
Value
0 0x1 Uart Ports 1 through 4 interrupt is active
1 0x2 Uart Ports 5 through 8 interrupt is active
2 0x4 CAN Port 1 interrupt is active
3 0x8 CAN Port 2 interrupt is active
4 0x10 J1708 Port interrupt is active
Reserved for future use
Bit Bit Comment(s)
Offset Value
0 0x1 PIC32 Microcontroller Reset
1 0x2 Uart Ports 1 through 4 reset
2 0x4 Uart Ports 5 through 8 reset
3 0x8 CAN Port 1 reset
4 0x10 CAN Port 2 reset
5 0x20 MultiTech Module-1 reset
6 0x40 MultiTech Module-2 reset
7 0x80 PC104 Address Bus test mode enable
Connect Tech Inc. Proprietary Information
IO Offset
Page 28 of 50
0.02
Date: Apr. 14, 2015