Connect Tech Multi-I/O Manuals

Manuals and User Guides for Connect Tech Multi-I/O. We have 1 Connect Tech Multi-I/O manual available for free PDF download: User Manual

Connect Tech Multi-I/O User Manual

Connect Tech Multi-I/O User Manual (50 pages)

Brand: Connect Tech | Category: Motherboard | Size: 2 MB

Table of Contents

Users Guide
1
Table of Contents

2
Customer Support Overview

4
Contact Information

4
Limited Lifetime Warranty

5
Copyright Notice

5
Trademark Acknowledgment

5
Revision History

6
Introduction

7
Configuration

8
Configuration Commands

14
- Memory Vs IO Spaces
  14
  - Memory Space
    14
  - I/O Space
    14
  - Board Address Decoding Capabilities
    14
  - Command Groups
    14
  - Serial Ports (UARTS)
    15
  - Serial Ports Enable / Disable
    16
  - Serial Port Clocking
    16
  - Serial Port DTR  DSR Wrapback
    16
  - RS422/485 (Port-5) Settings
    17
  - CAN Ports (SJA1000)
    18
  - CAN Port Clocking
    19
  - Board Configuration
    19
  - J1708 Configuration
    19
  - Misc Configuration
    20
    
    IO Address Ranges Set with IOD Command
    20
  - Testing / Debugging
    20
Operation

21
- Multitech Modules
  21
- Serial Ports (Uarts)
  22
  - Uart Registers
    22
  - RS232 Serial Ports
    23
  - RS422/RS485 Serial & J1708 Port
    24
  - CAN Ports (SJA1000)
    25
    
    CAN Port Registers
    26
  - LED Header
    27
  - Board Control/Status Registers
    28
    
    INTR_STAT Register (Offset 0X00, Read-Only)
    28
    
    RESET_CONT Register (Offset 0X00, Write-Only)
    28
- PC104 Bus Test
  28
  - LED_CONT Register (Offset 0X01, Read-Write)
    29
J1708 Bus Interface

30
- Operation
  30
  - Receiver
    30
  - Transmitter
    31
- Detecting Transmission Errors or Potential Problems
  31
- Transmission Success
  31
  - J1708 Interrupts
    32
  - Command, Control, Status Registers
    33
    
    Command Register (Offset: 0X00)
    33
- Restart J1708 Bus SYNC
  33
- Abort TX
  33
- TX Kick
  33
  - Control Register (Offset: 0X01, Mem=0X04)
    34
- Mask Reception of Good Transmitted Bytes
  34
- TX Priority Register (Offset: 0X02)
  34
IO Connector & Jumper Locations

38
Serial Port-8 to Module GPIO Configuration

39
- Location of Resistors
  39
FPGA Configuration Registers Via SPI

40
- Configuration Enhancements
  40
- FPGA Configuration Registers
  41
  - PORT_CONFIG[N] (Reg 0  10)
    43
  - IRQ_CONFIG[N] (Reg 12  16)
    46
  - MEM_CONFIG (Reg 17)
    47
  - MISC_CONFIG (Reg 18)
    49
  - FPGA_VERSION (Reg 19)
    50

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