Pmcparttl_Intrislreg; Pmcparttl_Intrisureg - Dynamic Engineering PMC-PARALLEL-TTL User Manual

pmcparttl_IntRisLreg

$3C Rising Interrupt Lower Control Register Port read/write
DATA BIT
31-0
Figure 18 PMC-PARALLEL-TTL Int rising Lower Bit Map

pmcparttl_IntRisUreg

$40 Rising Interrupt Upper Control Register Port read/write
DATA BIT
31-0
Figure 19 PMC-PARALLEL-TTL int Rising Upper Bit Map
The Rising Interrupt Enable control register bits correspond to the input data bits. All IO
can be set-up for COS activity even if defined as an output. In most cases the output
bits will be set to '0' for the Rising Interrupt Enable register. When set '1' and the
corresponding Rising bit is captured by the COS register an interrupt can be generated.
Please note that the master interrupt enable will also need to be set for the interrupt to
be requested.
DESCRIPTION
Rising Int En 31-0
DESCRIPTION
Rising Int En 63-32
Embedded Solutions Page 22