Pmcparttl_Rislreg; Pmcparttl_Risureg - Dynamic Engineering PMC-PARALLEL-TTL User Manual

pmcparttl_RisLreg

$2C Rising Lower Control Register Port read/write
DATA BIT
31-0
Figure 14 PMC-PARALLEL-TTL Rising Lower Bit Map

pmcparttl_RisUreg

$30 Rising Upper Control Register Port read/write
DATA BIT
31-0
Figure 15 PMC-PARALLEL-TTL Rising Upper Bit Map
The Rising control register bits correspond to the input data bits. All IO can be set-up for
COS activity even if defined as an output. In most cases the output bits will be set to '0'
for the Rising register. When set '1' and the corresponding input bit transitions from low
to high the COS register of rising activity will be have the corresponding bit set. If the
separate interrupt enable bit is also set then an interrupt can be generated.
register is a control register. The COS data is read back separately.
DESCRIPTION
Rising 31-0
DESCRIPTION
Rising 63-32
Embedded Solutions
The Rising
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