Theory of Operation
Output Board
COMP_SYNC
Genlock 1
BRST_COR
Genlock
SYNC_COR
Genlock 2
PAL/(NTSC)
Front
Panel
RS-232
Processor
Reset
Figure 3–1: SPG 422 block diagram
3–2
Digital Board
6.144 MHz
27 MHz
Genlock
Control
108 MHz
Frame RST
13.5 MHz
VCXO
Ext Data
Ext Address
Output Board
BLKCLK0
FRAME RST0
Fine
Phase
BLKCLK1
FRAME RST1
System Clock
System Frame Reset
SPG 422 Service Manual (B034000 and above)
Serial Aud 1
Serial Aud 2
BNC
Serial
Audio
Serial Aud 1
XLR
Serial Aud 2
Black 1
Black 1
Black 2
Black 2
Serial Blk
Serial Bars
and Black
Serial Bars
Option 1
Blacks 3, 4, 5, and 6
Black 3-6
(option1)
Option 2
Serial TST
Serial Test
(option 2)
Serial TST