Tektronix SPG 422 Service Manual page 91

Theory of Operation
Serial Coprocessor and
Outputs <2>
3–24
Serial Test Signal RAM. U13 and U11 are the Serial Bars RAM. Each line of the
video signal is stored in sample order, with each video line bottom-justified in
memory on 1 kB boundaries. The required video signals are downloaded into the
RAM at power on and are not changed during operation unless the video
standard is changed.
The the Serial Bars RAMs output, STDD[0..9], is the parallel video signal with
the TRS data loaded.
Audio Data RAM. The data in the Audio RAMs is the audio tone formatted in a
specific format for AES audio. This data is read out of the Audio RAMs at a
particular point in the video data stream to be embedded. The audio data is
placed into RAM by the microprocessor through the address, EA[0..14], and data
ED[0..7] buses and the various control signals.
Serial Digital Coprocessor. The parallel digital video data with TRS inserted,
STSD[0..9], enters U21. The audio data is then multiplexed the data into the data
stream from the Audio Data RAMs, U19 and U20. The video data with
embedded audio has EDH data is embedded, is scrambled, and exits U21 as the
serial digital test signal, SDT[0..9].
SDT[0..9] is serialized by U23 and is then amplified to drive the Serial Test
Signal outputs by U22.
SPG 422 Service Manual (B034000 and above)