Table 3-1 P2 Signal Multiplexing Sequence - Emerson MVME7616E Installation And Use Manual

Functional Description
Sixteen time slots are defined and allocated. The signal multiplexing sequences are listed in the
following table..

Table 3-1 P2 signal multiplexing sequence

MXDO (from the MVME510x/MVME550x)
Time Slot
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MXCLK is the 10MHz bit clock for the time-multiplexed data lines, MXDO and MXDI.
MXSYNC# is asserted for one bit time at Time Slot 15 by the MVME5100 and MVME5500
MXSYNC# is used by the MVME761 transition module to synchronize with the VME
modules.
MXDO is the time-multiplexed output line from the main board and MXDI is the time-
multiplexed line from the MVME761 transition module. A 16-to-1 multiplexing scheme is
used with a 10MHz bit rate.
MXSYNC# is clocked out using the falling edge of MXCLK and MDXO is clocked out with the
rising edge of the MXCLK. MXDI is sampled at the rising edge of MXCLK (the transition module
synchronizes MXDI with MXCLK's rising edge).
28
Signal Name
RTS3
DTR3
LLB3/MODSEL
RLB3
RTS4
DTR4
LLB4
RLB4
IDREQ#
DTR1
DTR2
Reserved
Reserved
Reserved
Reserved
Reserved
MVME7616E Transition Module Installation and Use (6806800A43B)
P2 Signal Multiplexing (P2MX)
MXDI (from the MVME7616E)
Time Slot Signal Name
0 CTS3
1 DSR3/MID1
2 DCD3
3 TM3/MID0
4 RI3
5 CTS4
6 DSR4/MID3
7 DCD4
8 TM4/MID2
9 RI4
10 RI1
11 DSR1
12 DCD1
13 RI2
14 DSR2
15 DCD2