Motorola ASTRO XTL 1500 Detailed Service Manual page 48

Product Overview: Controller Section 2-11
The DSP section of microprocessor performs signaling, voice encoding/decoding, audio filtering,
microphone gain and tuning, Private-Line/Digital Private Line (PL/DPL) encode, and alert-tone
generation. It processes all baseband audio signals, providing pre-emphasis and signaling/filtering of
the digital microphone audio data, as well as other transmitted signals. It also performs de-emphasis
and decoding of received digital speaker audio and other received signals. The DSP clock frequency
is derived from the 16.8 MHz reference oscillator clock input using a phase-locked loop (PLL) inside
the Patriot IC. The digital audio bus on the Patriot IC uses an 8 kHz clock, which provides the
sampling rate, and a 512 kHz clock, which provides the data rate.
The CODEC performs analog-to-digital and digital-to-analog conversions on audio signals. The DSP
controls squelch, deviation, and compensation, and it executes receiver filtering and discrimination.
The interface to the RX back-end IC (ABACUS III IC) consists of a single logic-level data line, a
1.2 MHz clock line (the discriminator data bit rate) and a 20 kHz frame-sync line (the discriminator
data sample rate). These clocks are generated by the ABACUS III IC and provided to the Patriot IC.
The interface to the TX modulation/DAC consists of a single logic-level data line, a 2.4 MHz clock
line (the modulation data bit rate), and a 48 kHz clock line (the modulation data sample rate). These
clocks are generated by the Urchin IC and provided to the Patriot IC.
Other functions provided by the controller include SB9600 communication, IC programming, and TX
power control. The SB9600 bus is used to communicate to legacy control heads and accessories. IC
programming is performed via the SPI bus for ICs including the ABACUS III, LV Frac-N, A/D, D/A,
and volume attenuator. The power-control circuitry receives power set and limit inputs from the D/A
IC and feedback from the RF power amplifier (RFPA). Based on these inputs, the circuit produces a
control voltage to maintain a fixed RF power level to the antenna.
The controller also provides detection of the On/Off and reset inputs. The reset circuits consist of the
regulator power-on reset circuit, low SW_B+ voltage-detector circuit, an ignition detection circuit, an
emergency detection circuit, and the external-bus system reset. The reset circuits allow the
microcomputer to recover from an unstable situation; for example, no battery on the radio, battery
voltage too high or too low, and remote devices on the external bus not communicating.
Communication using RS-232 protocol is provided to the rear accessory connector (J2).
6815854H01-A June 15, 2005