Reference Oscillator; Lv Frac-N Synthesizer Ic; Voltage Multiplier; Figure 3-41. Waveform Representation During Programming Of The Lv Frac-N Ic - Motorola ASTRO XTL 1500 Detailed Service Manual

Theory of Operation: Frequency Generation Unit (FGU)

3.13.4.1 Reference Oscillator

The radio's frequency stability and accuracy is derived from the 16.8 MHz reference oscillator
(Y6750). The 16.8 MHz reference oscillator circuitry provides a 16.8 MHz reference to the LV Frac-N
(U6751), receiver back-end IC (U6000), and the controller section of the XTL 1500 radio. The
reference oscillator circuitry consists of the reference oscillator Y6750 and the inverter/buffer circuitry
containing the active device U6752. Y6750 is a voltage-controlled, temperature-compensated crystal
oscillator (VCTCXO). Circuitry internal to Y6750 compensates for frequency error over temperature.
Warping of the oscillator on frequency is accomplished via a programmable DAC in the LV Frac-N.
The warp voltage is present at pin 25 (WARP) of U6751 and is applied to pin 4 of Y6750. The
16.8 MHz output frequency of Y6750 is capacitor-coupled to pin 24 of the LV Frac-N (U6751) and
also to the inverter/buffer stage U6752. L6756 and C6755 at the output of U6752 filter the 16.8 MHz
signal, and R6757 along with C6759 set the appropriate amplitude of the signal for the receiver back-
end and controller sections.

3.13.4.2 LV Frac-N Synthesizer IC

The LV Frac-N IC (U6751) functions include frequency synthesis, modulation control, voltage
multiplication and filtering, and auxiliary logic outputs for VCO selection.
U6751 is a mixed-mode IC containing digital and analog circuits. Separate power supply inputs are
used for the various functional blocks on the IC. Inductors L6752 and L6753 provide isolation
between supply pin 20 (AVDD - analog supply input) and pin 36 (DVDD - digital supply input)
connected to F3.0v. This 3.0 V DC supply is provided by U6750, a 3-V regulator IC.
All programmable variables on the synthesizer IC, such as the synthesizer frequency; reference-
oscillator warping; adapt-timer duration; modulation-attenuator setting; and auxiliary-control outputs,
which select one of four voltage-controlled oscillators, can be programmed through a serial
peripheral interface (SPI). The SPI is connected to the controller microcomputer via three
programming lines, namely the data (pin 7), clock (pin 8), and the chip enable (pin 9) of U6751
(Figure 3-41).

Figure 3-41. Waveform Representation During Programming of the LV Frac-N IC

3.13.4.3 Voltage Multiplier

Pin 12 (VMULT3) and pin 11 (VMULT4) of U6751, together with diode arrays D6751 and D6752 and
their associated capacitors C6763, C6766, C6769 and C6771, form the voltage multiplier. The
voltage multiplier generates 12.0 Vdc from the 3.0-V supply to supply the phase detector and
charge-pump output stage at pin 47 (VCP) of U6751. This voltage multiplier is basically a stacked,
multiple-diode capacitor network driven by two 1.05 MHz, 180 degrees out of phase signals from
pins 12 and 11 of U6751.
6815854H01-A
Pin 9 (Chip Select)
Pin 7 (Data)
Pin 8 (Clock)
MAEPF-27805-O
3-59
June 15, 2005