Figure 3-29. Output Network Components (Uhf Range 2) - Motorola ASTRO XTL 1500 Detailed Service Manual

3-38
The 0.5 mW TX_INJ signal is routed to the U5501 first stage device (Pin 16, RFIN) via C5508 to an
integrated, wide-band input match. U5501 is a two-stage LDMOS device with a bandpass interstage
match consisting of L5503, C5507, and C5509 routed between VD1 (pin 14) and G2 (pin 11). L5502
and L5505 provide the K9.1V drain bias voltage for the first and second stages to VD1 (pin 14) and
RFOUT1/2 (pins 6 and 7), respectively. The RFPA_CNTRL gate bias is provided to both stages
internally via VCNTRL (pin 1). Both U5501 stages are operated Class A and the second-stage output
power is approximately 250 mW.
Driver Stage
C5566, C5516, C5518 and a transmission line form a low-pass, interstage match that transfers
power to the Q5502 LDMOS transistor. R5511-R5515 provide device stability, and R5527, C5556,
C5525 and R5516 supply the VGBIAS3 gate bias. L5508, C5527, R5517, E5501 and C5526 form
the 9.3 V drain bias circuit. The 9.3 V drain voltage is supplied from regulator U5570. The 9.3 V
supply to the driver is only present during transmit and is disabled during receive via the K9.1V
signal and Q5570. Q5502 is operated Class AB and its output power is approximately 3.5 W.
Final Stage
C5559, C5560, C5535, C5538, and transmission lines form a low pass, splitter match that transfers
power to the LDMOS final-stage transistor Q5503. Q5503 contains two transistors in a single
package, each with it's own gate and drain lead. R5530, R5533, R5534, R5536, R5538-R5545
provide stability for Q5503. R5525, C5557, C5539 and R5520 supply the VGBIAS1 gate bias to
Q5503-7 via U5504-2 pin7. R5526, C5558, C5540 and R5521 supply the VGBIAS2 gate bias to
Q5503-6 via U5504-1 pin 1. Gate bias voltage to the final is adjusted dependant on the temperature
of Q5503. The output voltage from the temperature sensing IC, U5502-2, is summed via R5550 and
R5555 respectively with the gate bias voltage VGBIAS1 and VGBIAS2, via R5549 and R5554
respectively. As the temperature of the final device decreases the bias voltage applied to the gates of
U5503 is reduced. L5510, C5549, R5523, E5502 and C5550 form the A+ drain bias circuit to Q5503-
2 and Q5503-3. C5542-43, C5545-46, C5548, C5551-53 and transmission lines form a low -pass
combiner match that transfers approximately 51 W to the antenna switch. R5535 provides stability
for Q5503. Q5503 operates Class AB.
R5522 and U5503 comprise the final-stage, current-sense circuit that generates the VCURRENT
voltage proportional to the final stage current. R5519 sets the circuit gain. U5502 generates the
VTEMP voltage, which is proportional to the final-stage temperature.
3.12.3.1.2 Output Network (ON)
The ON consists of the antenna switch, harmonic filter, and power detector (see
RFPA_OUT
From
RFPA
June 15, 2005
ANTENNA
SWITCH
51W
RX_IN
K9.1V

Figure 3-29. Output Network Components (UHF Range 2)

Theory of Operation: Transmitter
POWER
DETECTOR
H-FILTER
VFORWARD
Figure 3-29).
VREVERSE
RF
CONNECTOR
J5701
6815854H01-A
44W