AD9273
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
LI-E
LG-E
AVDD2
AVDD1
LO-F
LOSW-F
LI-F
LG-F
AVDD2
AVDD1
LO-G
LOSW-G
LI-G
LG-G
AVDD2
AVDD1
LO-H
LOSW-H
LI-H
LG-H
AVDD2
AVDD1
CLK–
CLK+
AVDD1
NOTES
1. THE EXPOSED PAD SHOULD BE TIED TO A QUIET ANALOG GROUND.
PIN 1
1
INDICATOR
2
3
4
EXPOSED PADDLE, PIN 0
5
(BOTTOM OF PACKAGE)
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Figure 4. TQFP Pin Configuration
2
1
A
B
C
D
E
F
G
H
J
K
L
M
Figure 5. BGA Pin Configuration
AD9273
TOP VIEW
(Not to Scale)
4
6
8
10
12
3
5
7
9
11
TOP VIEW
(Not to Scale)
Rev. B | Page 12 of 48
LI-D
75
LG-D
74
AVDD2
73
AVDD1
72
LO-C
71
LOSW-C
70
LI-C
69
LG-C
68
AVDD2
67
AVDD1
66
LO-B
65
LOSW-B
64
LI-B
63
LG-B
62
AVDD2
61
AVDD1
60
LO-A
59
LOSW-A
58
LI-A
57
LG-A
56
AVDD2
55
AVDD1
54
CSB
53
SDIO
52
SCLK
51
Need help?
Do you have a question about the AD9273 and is the answer not in the manual?
Questions and answers