4.16 Serial Peripheral Interface (SPI)
4.16 Serial Peripheral Interface (SPI)
Writes data to SPI1 and SPI2 (polling)
spi1
Reads the values from the accelerometer MMA7455L over the SPI interface and writes
spi2
the data on the serial interface (polling).
spi2 realized with interrupts (IRQ).
spi3
STM32F103RB have 2 SPIs which are able to communicate up to 18 Mbits/s in slave and master
modes in fullduplex and simplex communication modes. The 3-bit prescaler gives 8 master mode
frequencies and the frame is configurable from 8-bit to 16-bit. The hardware CRC generation/ver-
ification supports basic SD Card/MMC modes.
4.16.1 Physical Layer
The synchronous serial interface SPI allows a data transfer in both directions. Therefore following
wires are required:
SCK: Clock (generated by the master)
MISO: Master in, Slave out
MOSI: Master out, Slave in
NPCK or NSS: Chip select for the slave, this wire is not generated by the SPI driver, a normal
GPIO pin has to be used.
In case more than one slave is accessed, an enable wire (NPCK or NSS) for each slave is required.
Figure
4.23
shows a basic SPI network.
4.16.2 Communication Protocol
The clock signal is only generated by the master device (normally the main microcontroller). If no
data are transmitted the clock is not active.
The data communication is shown in Figure 4.25. The chip select line NSS goes low in order to
start the communication. This wire is needed since SPI don't use an address like I C.
The master sends its data on the MOSI line to the slave, the slave its data on the MISO line to the
master. Data are only allowed to change while a falling (CPOL = 0) or rising (CPOL = 1) flank of
SCK.
The SPI can as well be used as I S bus for point to point communication. Refer to the reference
manual if you want to use this feature.
Lukas Kohler
2
Electrocardio
The Electrocardiogram
• Ecg: electrical ma
from the body surfa
• monitoring of heart
The Ecg signal can b
electrodes placed on the l
below.
Josef Goette
45
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