Performance Line Block Diagram - STMicroelectronics STM32 Cortex-M3 Manual

2.4 Processor STM32F103RB from STMicroelectronics

2.4.2 Performance Line Block Diagram

STM32F103x8, STM32F103xB
The block diagram in Figure
Figure 1.
TRACECLK
TRACED[0:3]
as AS
NJTRST
JTCK/SWCLK
JTMS/SWDIO
PA[ 15:0]
PB[ 15:0]
PC[15:0]
PD[15:0]
PE[15:0]
4 Chann els
3 co mpl. Chann els
ETR and BKIN
MOSI,MISO,
SCK,NSS as AF
RX,TX, CTS, RTS,
Smart Card as AF
16AF
V
REF+
V
REF-
1. T = –40 °C to +105 °C (junction temperature up to 125 °C).
A
2. AF = alternate function on I/O port pin.
Lukas Kohler
2.1 shows how the components and the core are connected together.
STM32F103xx performance line block diagram
TPIU
Trace/trig
SW/JTAG
TRST
JTDI
Cortex-M3 CPU
JTDO
F : 7 2 M Hz
max
as AF
NVIC
GP DMA
7 ch annels
@VDDA
SUPPLY
SUPERVISION
NRST
VDDA
POR / PDR
VSSA
PVD
EXTI
80AF
WAKEUP
GPIOA
GPIOB
GPIOC
GPIOD
GPIOE
TIM1
SPI1
USART1
@VDDA
12bit ADC1
IF
12bi t ADC2
IF IF
Temp sensor
Figure 2.1: STM32F103xx Performance Line Block Diagram
Doc ID 13587 Rev 10
Trace
pbu s
Controlle r
Ibus
Flash 128 KB
64 bit
Dbus
SRAM
Syst em
20 KB
PCLK1
PCLK2
HCLK
FCLK
RC 8 MHz
RC 40 kHz
@VDDA
Rst
AHB2 AHB2
Int
APB2 APB 1
POWER
VOLT. REG.
3.3V TO 1.8V
@VDD
@VDD
PLL & XTAL OSC
CLOCK 4-16 MHz
MANAGT
IWDG
Stand by
in terface
@VBAT
XTAL 32 kHz
Back up
RTC
reg
AWU
Backu p i nterf ace
TIM2
TIM3
TIM 4
USART2
USART3
SPI2
2x(8x16bit)
I2C1
I2C2
bx CAN
USB 2.0 FS
SRAM 512B
W W D G
Description
2 Electrocardio
The Electrocardiogram
V = 2 to 3.6V
DD
V
SS
• Ecg: electrical ma
from the body surfa
• monitoring of heart
OSC_IN
OSC_OUT
The Ecg signal can b
electrodes placed on the l
V
BAT
below.
OSC32_IN
OSC32_OUT
TAMPER-RTC
4 Chann els
4 Chann els
4 Chann els
RX,TX, CTS, RTS,
CK, SmartCard as AF
RX,TX, CTS, RTS,
CK, SmartCard as AF
MOSI,MISO,SCK,NSS
as AF
SCL,SDA,SMBA
as AF
SCL,SDA
as AF
USBDP/CAN_TX
USBDM/CAN_RX
ai14390d
Josef Goette
7
19/91