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Mini-ITX Mainboard Manual
3.6
A
DVANCED
DRAM Timing Selectable
When synchronous DRAM is installed, the number of clock cycles of
CAS latency depends on the DRAM timing.
The Choices: By SPD (Default) / Manual
CAS Latency Time
When synchronous DRAM is installed, the number of clock cycles of
CAS latency depends on the DRAM timing.
The Choices:5 (Default) / 4 / 3 / 6 / Auto
DRAM RAS# to CAS# Delay
This field let you insert a timing delay between the CAS and RAS strobe
signals, used when DRAM is written to, read from, or refreshed. Fast
gives faster performance; and slow gives more stable performance. This
field applies only when synchronous DRAM is installed in the system.
The Choices: 5 (Default) / 2 / 3 / 4 / 6 / Auto
30
C
F
HIPSET
EATURES
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