Adaptive Clock Recovery - Alcatel-Lucent 7210 SAS M Configuration Manual

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System Basics Introduction

Adaptive Clock Recovery

NOTE: ACR is supported only with CES MDA on 7210 SAS-M network mode.
Adaptive Clock Recovery (ACR) is a timing-over-packet technology that transports timing
information via periodic packet delivery over a pseudowire. ACR is used when there is no other
Stratum 1 traceable clock available.
NOTE: ACR is supported only on the 7210 SAS-M (both ETR and non-ETR variant) only with
T1/E1 CES MDA and only in network mode.
ACR technique utilizes the packet arrival rate of a TDM pseudowire to regenerate a clock signal. It
does not incur any additional equipment cost. The nodes in the network that are traversed between
endpoints do not need special ACR capabilities, but the TDM pseudowire is transported over
Layer 2 links, therefore, the packet flow is susceptible to PDV.
A good ACR performance can be derived by the following recommendations:
There are five potential ACR states: Normal, Phase tracking, Frequency tracking, Holdover and
Free-run. When a port's ACR state is normal, phase tracking, or frequency tracking, the recovered
ACR clock is considered to be a qualified reference source for the SSU. If this reference source is
being used, then transitions between any of these three states will not affect SSU operation. When
a port's ACR state is free-run or holdover, the recovered ACR clock is disqualified as a reference
source for the SSU. If this reference source is being used, then transitions to either of these two
states cause the SSU to drop the reference and switch to the next highest prioritized reference
source. This can potentially be SSU holdover.
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A packet rate of 1000 pps to 4000 pps is recommended, as lower packet rates cause ACR
to be more susceptible to PDV in the network.
Limit the number of nodes traversed between the source-end and the ACR-end of the
TDM pseudowire.
Enable QoS in the network with the TDM pseudowire enabled for ACR classified as NC
(network control).
Maintain a constant temperature, as temperature variations affect the natural frequency on
the internal oscillators in the 7210 SAS.
Ensure that the network does not contain a timing loop when it is designed.
7210 SAS M, T, X, R6 Basic System Configuration Guide

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