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Watchdog Timer Configuration Register 1‐ base address +05h
Bit
Name
7
Reserved
6
WDTMOUT_STS
5
WD_EN
4
WD_PULSE
3
WD_UNIT
2
WD_HACTIVE
1‐0
WD_PSWIDTH
Watchdog Timer Configuration Register 2‐ base address +06h
Bit
Name
7‐0
WD_TIME
Watchdog PME Control Register ‐ base address + 0Ah
Bit
Name
7
WDT_PME
6
WDT_PME_EN
5‐1
Reserved
0
WDOUT_EN
User's Manual
R/W Default
Description
R
0
Reserved
R/W
0
If watchdog timeout event occurs, this bit will be set to
1. Write a 1 to this bit will clear it to 0.
R/W
0
If this bit is set to 1, the counting of watchdog time is
enabled.
R/W
0
Select output mode (0:level, 1:pulse) of RSTOUT# by
setting this bit.
R/W
0
Select time unit (0:1sec, 1:60sec) of watchdog timer by
setting this bit.
R/W
0
Select output polarity of RETOUT# (1:high active, 0:low
active) by setting the bit.
R/W
0
Select output pulse width of RSTOUT#
0:1 ms 1:25 ms
2:125 ms 3:5 sec
R/W Default
Description
R/W
0
Time of watchdog timer
R/W Default
Description
R
‐‐
The PME Status
This bit will set when WDT_PME_EN is set and the
watchdog timer is 1 unit before time out (of time out)
R/W
0
0 : Disable Watchdog PME.
1 : Enable Watchdog PME
‐‐
‐‐
Reserved
R/W
0
0 : disable Watchdog time out output via WDTRST#
1 : enable Watchdog time out output via WDTRST#
5.0 System Resource
Page 5-7
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