4DSP FMC230 User Manual page 8

UM023 FMC230 User Manual
Analogue output bandwidth
Input Level
Input impedance
Input range
Input Level
Input impedance
Input range
Input Level
Input impedance
Input range
Output Level
Format
Frequency range
Format
Frequency Range
1
3.3V LVTTL into 50Ohm would result in 14dBm, a 1A Schottky diode in the clock input circuit protects
the clock input from overvoltage when driving the input with a LVTTL signal.
2
AD9517 device does support up to 2850MHz with a clock input level of 0dB and higher.
UM023
1.4GHz, please refer to AD9129 datasheet for details
External sampling clock input
-10dBm < Clock In Level < 10dBm
0dBm typical (LVTTL level supported
50Ω
4.5 MHz to 2850 MHz
External reference clock input
Serial numbers FMC230-0000 to FMC230-0186
LVTTL: 3.6 > V
50Ω (DC-coupled)
0MHz to 250MHz
Serial numbers FMC230-0187 and above
LVTTL: 3.6 > V
Input is DC-coupled and self-biased to 1.5V, refer to 4.7
5KΩ
0MHz to 250MHz
External clock output
800mVp-p into 50Ω typical
(LVCMOS output available as build option, contact 4DSP)
External Trigger input
LVTLL/LVCMOS33
Logic '0'  max 0.8V / Logic '1'  min 2.0V
Up to 300 MHz
Internal sampling clock
LVPECL
DAC: up to 5300MHz (Software selectable, contact 4DSP for
frequencies higher frequencies up to 5700MHz)
Table 2 : FMC daughter card main characteristics
www.4dsp.com
1
)
2
> 2.0V, -0.3 < V < 0.8V
IH IL
> 2.0V, -0.3 < V < 0.8V
IH IL
r1.11
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