Motorola M68HC08 Manual page 29

4.2.3 Protection Features
DRM046 — Rev 0
MOTOROLA
Freescale Semiconductor, Inc.
generated by the output compare function on the timer pin, while 6 GPIO
pins are set/cleared according to the commutation vector. Six external
NAND logic gates provide PWM signals to the MOSFET pre-drivers
according to the generated PWM (see Figure 5-3. Microcontroller with
Logic).
The bootstrap capacitors of high-side MOSFET drivers require
pre-charging before the motor is started. Therefore, all three low-side
MOSFETs are turned on for 10msec before each motor start. Such
operation enables charging the bootstrap capacitors and a reliable motor
start up.
During deceleration the motor can work as a generator. In the generator
state, the DC-Bus capacitor is charged and its voltage can easily exceed
its maximal voltage. Therefore, the DC-Bus voltage is measured and
compared with the limit. Where there is deceleration over-voltage, the
deceleration is interrupted and the motor runs with constant speed in
order to discharge the DC-Bus capacitor. Then deceleration can
continue.
The drive accommodates a fault protection. DC-Bus current is evaluated
by hardware and in the case of an over-current, a fault signal is
generated. The fault signal is processed by MCU interrupt (IRQ) and
software immediately disables the PWM output. DC-Bus voltage is
measured during the control process. Where there is over-voltage or
under-voltage, the drive enters a fault state. If any of the afore mentioned
faults occur, the motor control PWM outputs are disabled in order to
protect the drive. The drive can be enabled again using the run/stop
switch.
3-Phase BLDC Low Voltage Reference Design
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3-Phase BLDC Low Voltage Reference Design
Application Description
Designer Reference Manual
29