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UM008 FMC204 User Manual
4.2 Electrical specifications
The FMC204 uses high-speed LVDS outputs. Revision 1 boards require +2.5V on VADJ
power supply (supplied by the carrier card). Revision 2 boards can operate with a VADJ
voltage range of 1.65V to 3.3V, but typically VADJ will be 1.8V or 2.5V for LVDS operation.
The voltage on VIO_B pins will be at the same level as VADJ as it is connected directly to
VADJ on the FMC204.
The data converters operate in LVDS mode (clock and data pairs). All other status and
control signals, like serial communication busses, operate at LVCMOS level (V
4.2.1 EEPROM
The FMC204 card carries a 2Kbit EEPROM which is accessible from the carrier card through
2
the I
C bus. The EEPROM is powered by 3P3VAUX. The standby current is only 0.01µA
when SCL and SDA are kept at 3P3VAUX level. These signals may also be left floating since
pull-up resistors are present on the card.
4.2.2 JTAG
The CPLD device is included in the JTAG chain accessible from the FMC connection. The
user should NOT reprogram or erase the CPLD.
4.2.3 FMC HPC
The high-pin count connector has four dedicated LVDS clock pairs and can host up to 80
LVDS (data) pairs. Refer to appendix A for a detailed pin-out.
UM008
www.4dsp.com
r1.14
= VADJ).
OH
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