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UM008 FMC204 User Manual
Field
DIRx
'0'
'1'
FANx
'0'
'1'
Table 13: Register CPLD_REG1 description
Bit nr.
Bit 7
Name
Table 14: Register CPLD_REG2 definition (read)
Field
REFMON
LD
STATUS
VM
'0'
'1'
IRQ
'0'
'1'
Table 15: Register CPLD_REG2 description (read)
Bit nr.
Bit 7
Name
Table 16: Register CPLD_REG2 definition (write)
UM008
Direction of Front IO transceiver (x = 0 to 3)
Signal x is input (FMC204 is receiver)
Signal x is output (FMC204 is transmitter)
Power control for FAN header (x = 0 to 3)
Apply power to FAN header x
Cut power to FAN header x
Bit 6
Bit 5
Reserved
Reflect the status of the REFMON output of the AD9517
Reflect the status of the LD output of the AD9517
Reflect the status of the STATUS output of the AD9517
Reflect the status of the INT# output of the ADT7411 (inverted)
INT# is not asserted
INT# is asserted, access to the ADT7411 trough the I
determine the source of the interrupt
Logic function: NOT (REFMON AND LD AND STATUS AND INT#)
All status signals indicate OK
One or more status signals indicate ERROR
Bit 6
Bit 5
Reserved
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Description
Bit 4
Bit 3
IRQ
VM
STATUS
Description
Bit 4
Bit 3
LED_SEL
r1.14
Bit 2
Bit 1
LD
REFMON
2
C bus is required to
Bit 2
Bit 1
Bit 0
Bit 0
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