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Schematic Diagrams
AMD S1: MISC
8
CPURST#
16,23,24,26
8
CPU_PWRGD
+2.6VS
R411
8
LDTSTOP#
PLACE WITHIN 1"
5MIL TRACE
10MIL SPACE
Sheet 3 of 40
AMD S1: MISC
ROUTE AS DIF 5/5/5/20
LAYOUT: PLACE 169 OHM NO MORE THAN
500 MILS FROM CPU
CHECK POWER ENGINEER DEFAULT CLOSE OR OPEN
VCORE+ VCORE- Place trace 12 mils.
B - 4 AMD S1: MISC
+1.8V
C477
+2.6VS
0.1u_X7R
R410
1K
U26
+1.8V
S1_VDDA
74LVC1G08GW
R427 *300
CPURST#
2
4
1
+1.8V
S1_VDDA
3
PWRGD
+1.8V
C28
C25
+2.6VS
U28
R430
3300p_X5R
R421
1K
2
*300
0.22u
4
CPU_PWRGD
1
+1.8V
3
U24B
+1.8V
74LVC1G08GW
U27
F8
VDDA
1K
2
R426
F9
VDDA
4
LDTSTOP#
1
*300
3
B7
RESE T*
A7
PW ROK
74LVC1G08GW
F10
LDTSTOP*
R37
44.2_1%
L0_REF1
P6
+1.2V_HT
HTREF1
R38
44.2_1%
L0_REF0
R6
HTREF0
VCORE+
F6
VDD_ FB
35
VCORE+
VCORE-
E6
VDD_ FB*
35
VCORE-
ROUTE AS DIFF
PAIR 5/5/5,10 MIL
W9
VDDIO_FB
TO OTHER SIGNALS
OR 10/10 IF SE
Y9
VDDIO_FB*
CPU_SUS_FB
33
CPU_SUS_FB
C468
3900PF_X7R
CPUCLK_H
CLKIN
A9
CLK IN
8
CPUCLK_H
A8
CLK IN*
R405
C467
169_1%
CPUCLK_L
CLKIN#
8
CPUCLK_L
3900PF_X7R
CPU_DBRDY
G10
DBRDY
+1.8V
CPU_TMS
AA9
TMS
CPU_TCK
AC9
TCK
CPU_TRST#
R46
AD9
TRST*
CPU_TDI
C619
AF9
TDI
510
0.1u
S1_TEST25
E9
TES T25
S1_TEST25#
E8
TES T25*
S1_TEST19
G9
TES T19
S1_TEST18
H10
TES T18
AA7
TES T13
C2
TES T9
R41
R43
R48
300
300
510
D7
TES T17
TP_S1_ TEST 1 7
E7
TES T16
TP_S1_ TEST 1 6
F7
TES T15
TP_S1_ TEST 1 5
C7
TP_S1_ TEST 1 4
TES T14
AC8
TP_S1_ TEST 1 2
TES T12
C3
TES T7
AA6
TES T6
THERMDC
W7
TES T5
12MIL
THERMDA
W8
TES T4
Y6
TES T3
AB6
TES T2
B3
RSVD
H19
RSVD
H18
RSVD
W18
RSVD
D5
RSVD
N20
RSVD
P20
RSVD
VCORE
P19
RSVD
N19
RSVD
P22
5/18
RSVD
J2
OPEN
R26
RSVD
1
2
35
VCORE+
I290
C441
10u_08
J1
OPEN
S4
SHORT
1
2
1
2
35
VCORE-
VGND
5 / 2 0 C h a n g e
+1.8V
40MIL
VCORE
+2.5VCPU
R371
*300
L42
R374
680_06
FCI2012F-R33K
C23
C432
THERMTRIP
+
4.7u_08
100u_6.3V_B
R367
R364
*300
300
AMD-638P-SK1
SKT638
CPU_FETGATE
SEC 2 OF 6
MISC
AF6
THE RMTRIP*
AC7
Z0308
PROCHOT*
AF5
+1.8VS
SID
AF4
SIC
R365
300
A5
V ID<5>
CPU_VID5 5,35
C6
V ID<4>
CPU_VID4 5,35
A6
+1.8V
V ID<3>
CPU_VID3 5,35
A4
V ID<2>
CPU_VID2 5,35
C5
V ID<1>
CPU_VID1 5,35
B5
V ID<0>
CPU_VID0 5,35
R366
CPU_PSI#
A3
P SI*
CPU_PSI# 35
1K
AC6
CPUPRESENT
CPU_PRESENT*
E10
CPU_DBREQ*
DBREQ*
CPU_TDO
AE9
LAYOUT: ROUTE TRACES 80 OHM DIFF IMPEDENCE
TDO
FBCLKOUT
8/5/20 SPACING
R44
C9
TEST2 9
80.6_1%
C8
TES T29*
FBCLKOUT#
AE7
TEST2 4
TP_ S1_ TEST 24
16,23,24,26
AD7
TEST2 3
TP_ S1_ TEST 23
AE8
TEST2 2
TP_ S1_ TEST 22
AB8
R42
300
TEST2 1
TP_ S1_ TEST 21
AF7
TEST2 0
TP_ S1_ TEST 20
J7
TEST2 8
H8
+1.8V
TES T28*
AF8
TEST2 7
AE6
R372
300
TEST2 6
K8
TEST1 0
C4
TEST8
+VDD3
Q36
B18
RSVD
R25
S
D
Z0304
RSVD
R23
RSVD
H16
RSVD
R22
AO3409
RSVD
R24
R360
100K
RSVD
C1
RSVD
H6
Z0303
RSVD
G6
RSVD
AA8
RSVD
G
24
THERM_RST#
NC
Q35
2N7002
+5VS
16,18,19,23,24,25,26,27,29,30,32
+VDD3
23,24,26,31,32,33,34
+VDD3
+VDD5
2,16,24,26,27,28,31,32
+3VS
2,6,7,10,11,12,13,14,15,16,18,19,20,21,23,25,26,27,28,29,30,32
+3V
11,14,16,17,18,21,22,23,26,28,30,32,33,35
+1.8V
2,4,5,6,7,33,34
C408
+1.2V_HT 2,5,8,12
+2.6VS
8,11,12,25
0.1u
VCORE
5,35
+1.8VS
5,12
Low active to short
down system.
5/18
R381
680_06
Z0301
TRMTRIP# 32
S1_VDDA
B
Q39
2N3904
Q38
B
2N3904
Q37
R370
4.7K
+3VS
S
D
R369
*680_06
AMD_PROCHOT# 24
BSS138
+1.8V
+1.8V
VCORE
C51
C444
C617
0.1u
0.1u_X7R
0.1u
C618
0.1u
+1.8V
R397
*560
R396
*560
R390
*560
+2.6VS
JDEBUG1
CPU_TDO
1
2
CPU_TMS
CPU_DBRDY
3
4
CPU_TCK
CPU_DBREQ*
5
6
CPU_TRST#
7
8
CPU_TDI
9
10
+3VS
R391
*560
*H8_DEBUG_PORT
+3V
+2.5VCPU
40MIL
PU1
1
5
VIN
VO
PR13
10K
3
PWRGD
SD
2
4
PR11
10K_1%
GND
ADJ
PC15
1u_06
G916T1U
PR14
10K_1%
+VDD3
R362
Z0302
200_06_1%
R363
C448
R356
100K
1u
R361
R358
D36
SCS751V
C
A
U22
4.7K
4.7K
10K
1
4
VDD
THERM
THERMDA
2
6
D+
ALERT
C445
2200p_06
THERMDC
3
7
SMD_THERM 24
D-
SDATA
5
8
SMC_THERM 24
GND
SCLK
F75383M
R392
8.2K
CPU_FETGATE
R56
34.8K_1%
+1.8V
R398
*560
R395
*560
R393
*560
5/18
PC14
2.2u_08
PM_THRM# 16
THERM_TRIP# 24
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