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23 Display
23.1 The Control signals to the display
The processor controls the display with serial data through an I2C-bus, Inter IC.
The I2C-bus consist of two lines, I2CDAT for data and I2CCLK for clocking.
To get as good readability as possible of the display in different angles and to get clear contrast;
the display has to be regulated exactly.
A negative voltage, VLCD, regulate the contrast.
It is achieved with two PWM signals, Pulse Width Modulation, from the processor and some
discrete components.
By varying the pulse width of the PWM signal, the level of VLCD can be regulated.
Three serial connected "charge pumps" are used in the phone to create negative voltage.
The principle is explained in the figure above. Fig.23.1.
4/00021-3/FEA 209 544/18 B
Trouble Shooting Guide, Advanced
Fig. 23.1
100(121)
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