Figure 3-3. Analog Trigger Block Diagram; Figure 3-4. Below-Low-Level Analog Triggering Mode - National Instruments VXI-MIO Series User Manual

Chapter 3 Hardware Overview
Note:
Analog
Input
Channels
PFI0/TRIG1
VXI-MIO Series User Manual
The PFI0/TRIG1 pin is a high-impedance input. Therefore, it is
susceptible to cross-talk from adjacent pins, which can result in false
triggering when the pin is left unconnected. To avoid false triggering, make
sure this pin is connected to a low-impedance signal source (less than
10 k source impedance) if you plan to enable this input via software.
There are five analog triggering modes available, as shown in
Figures 3-4 through 3-8. You can set lowValue and highValue
independently in software.
In below-low-level analog triggering mode, the trigger is generated
when the signal value is less than lowValue. HighValue is unused.
lowValue
Trigger

Figure 3-4. Below-Low-Level Analog Triggering Mode

In above-high-level analog triggering mode, the trigger is generated
when the signal value is greater than highValue. LowValue is unused.
+
PGIA
-
Mux

Figure 3-3. Analog Trigger Block Diagram

3-12
ADC
Analog
Trigger DAQ-STC
Circuit
National Instruments Corporation