Convert* Signal; Figure 4-21. Convert* Input Signal Timing - National Instruments VXI-MIO Series User Manual

Multifunction i/o modules for vxibus
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Chapter 4
Signal Connections
VXI-MIO Series User Manual

CONVERT* Signal

Any PFI pin can externally input the CONVERT* signal, which is
available as an output on the PFI2/CONVERT* pin.
Refer back to Figures 4-11 and 4-12 for the relationship of CONVERT*
to the data acquisition sequence.
As an input, the CONVERT* signal is configured in the edge-detection
mode. You can select any PFI pin as the source for CONVERT* and
configure the polarity selection for either rising or falling edge. The
selected edge of the CONVERT* signal initiates an A/D conversion.
As an output, the CONVERT* signal reflects the actual convert pulse
that is connected to the ADC. This is true even if the conversions are
being externally generated by another PFI. The output is an active low
pulse with a pulse width of 50 to 100 ns. This signal is set to input
(High-Z) at startup.
Figures 4-21 and 4-22 show the input and output timing requirements
for the CONVERT* signal.
Rising-edge
polarity
Falling-edge
polarity

Figure 4-21. CONVERT* Input Signal Timing

t
w
t
= 10 ns minimum
w
4-32
National Instruments Corporation

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