Figure 3-1. Pc-Lpm-16Pnp Block Diagram - National Instruments PC-LPM-16/PnP User Manual

Chapter 3 Theory of Operation
Interrupt
Interface
+12 V
-12 V
+5 V
PC-LPM-16/PnP User Manual
PC I/O
256-Word
Channel
FIFO
Interface
Plug and
Play
OUT0
CLK0
1 MHz
MSM82C53
Digital
12-Bit
Buffer
Sampling
ADC
A/D Timing
FROM A/D FIFO
I/O

Figure 3-1. PC-LPM-16PnP Block Diagram

3-2
Input Mux
16-Channel
Single-Ended
16
Scanning Counter
EXTCONV*
3
GATE<0..2>
CLK<1..2> 2
3
OUT<0..2>
OUT1 OUT1*
EXTINT*
8
8
+12 V
0.5 A
-12 V
+5 V
1.0 A
National Instruments Corporation