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Appendix D
Register-Level Programming
Programming Multiple A/D Conversions on a Single Input Channel Using
Counter 0
PC-LPM-16/PnP User Manual
Table D-3.
Input Voltage
-5.0
-2.5
0
2.5
4.9976
Clearing the Analog Input Circuitry
Write to the A/D Clear Register to clear the analog input circuitry,
which leaves the analog input circuitry in the following state:
•
Analog input error flag OVERFLOW is cleared.
•
Pending interrupt requests are cleared.
To empty the A/D FIFO before starting any A/D conversions, perform
two 8-bit reads on the A/D FIFO Registers and ignore the data read.
This operation guarantees that the A/D conversion results read from the
A/D FIFO are from the initiated conversions rather than leftover results
from previous conversions.
To clear the analog input circuitry and the A/D FIFO:
•
Write 0 to the A/D Clear Register (8-bit write).
This manual refers to a sequence of timed A/D conversions as a data
acquisition operation. Counter 0 of the MSM82C53 is used as the
sample-interval counter. In a data acquisition operation, counter 0
continuously generates the conversion pulses. The software keeps track
of the number of conversions that have occurred and turns off counter 0
Bipolar Input Mode A/D Conversion Values
A/D Conversion Result
Range: -5 to +5 V
(13-bit values)
(Decimal)
(Hex)
-4,096
F000
-2,048
F800
0
0000
2,048
0800
4,095
0FFF
D-30
A/D Conversion Result
Divided by 2
(12-bit values)
(Decimal)
(Hex)
-2,048
F800
-1,024
FC00
0
0000
1,024
0400
2,047
07FF
National Instruments Corporation
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