Figure 4-6. Frequency Measurement Application - National Instruments PC-LPM-16/PnP User Manual

Chapter 4 Signal Connections
duration. In this case, program the counter to count falling edges at the
CLK input while the gate is applied. The frequency of the input signal
then equals the count value divided by the gate period. Figure 4-6
shows the connections for a frequency measurement application. You
could also use a second counter to generate the gate signal in this
application.
+5 V
4.7 kW
CLK
OUT
GA TE
Signal Gate
Counter
Source Source
17
DGND
I/O Connector
PC-LPM-16PnP

Figure 4-6. Frequency Measurement Application

4.7 k resistors pull up the GATE and CLK pins to +5 V.
Figure 4-7 shows the timing requirements for the GATE and CLK input
signals and the timing specifications for the OUT output signals.
The following specifications and ratings apply to the MSM82C53 I/O
signals:
• Absolute maximum
voltage input rating -0.5 to 7.0 V with respect to DGND
National Instruments Corporation 4-11 PC-LPM-16/PnP User Manual