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Service Manual
2.2.1.3 Interrupt Control
deterrnines the priority level of the interrupt and outputs it to terminals
The
Then an interrupt is sent to the CPU. When the
interrupt process. When the
process. When the
DRAM Management
2.2.1.4
video controller uses DRAMs for the system RAM and for the V-RAM.
The
In this printer, a standard four 512K x DRAMs are mounted in locations
providing a total of 2.0 MB. SIMM sockets number
SIMM sockets. These SIMM sockets can use 1,2,4,8,16,32 MB SIMM (32-bit bus).
The DRAMs (including optional
handles the management. The
signals.
DWE
CAS0,1,2,3
MAO-10
CPU Data
Bus
Rev.
is any other value, the CPU process is a rnaskable interrupt process.
are managed by the
outputs MAO-10 (memory address),
r
I
Standard
DRAM
Figure 2-40. DRAM Management
value is
value is
the CPU process is a standard
and number 2
E05A91. The
SIMM
slot 1,2
Operating Principles
-
the CPU process is a
and
are optional
and WE
2-27
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