MSI 648M-IL User Manual page 45

DRAM timings to be determined by BIOS based on the configurations
on the SPD. Selecting Manual allows users to configure the DRAM
timings manually.
DRAM CAS Latency
This controls the timing delay (in clock cycles) before SDRAM starts a
read command after receiving it. Settings are: 2T, 2.5T, 3T. 2T increases
the system performance while 3T provides the most stable performance.
RAS Active Time (tRAS)
This setting controls the number of clock cycles for DRAM to be allowed
to precharge from the active state. Settings: 4,T, 5T, 6T, 7T, 8T, 9T.
RAS Precharge Time (tRP)
This item controls the number of cycles for Row Address Strobe (RAS)
to be allowed to precharge. If insufficient time is allowed for the RAS to
accumulate its charge before DRAM refresh, refresh may be incomplete
and DRAM may fail to retain data. This item applies only when
synchronous DRAM is installed in the system. Available settings: 2T,
3T, 4T, 5T.
RAS to CAS Delay (tRCD)
When DRAM is refreshed, both rows and columns are addressed
separately. This setup item allows you to determine the timing of the
transition from RAS (row address strobe) to CAS (column address strobe).
The less the clock cycles, the faster the DRAM performance. Setting
options: 2T, 3T, 4T, 5T.
MA 1T/2T Select
This setting controls the SDRAM command rate. Selecting 1T allows
SDRAM signal controller to run at 1T (T=clock cycles) rate. Selecting
2T makes SDRAM signal controller run at 2T rate. 1T is faster than 2T.
Setting options: Auto, 1T, 2T.
AGP & P2P Bridge Control
Press <Enter> and the following sub-menu appears.
BIOS Setup
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