V I Deo Card To System Interface Signals - Zenith Z-100 Reference Manual

Page 7.16
Video Graphics Programming
Table 7.6. Video Card to System Interface Signals
SIGNAL
NAME DESCRIPTION
AO to AI9 The 20 system address lines used to access memory locations.
DO to D7 Bidirectional data lines which transfer information between the
CPU and the internal registers of the 6845.
CS+
Chip Select signal typically generated by system address decoding
logic.
CS+ must be low to read information from or write information
to one of the 6845 internal registers.
6845 register select signal.
Rather than sacrifice five of the 40 available pins to 6845 register
addressing, one of the registers is used as an address register
to access the other 18 registers. When the RS signal is low, the
address register is accessed and can then be loaded with the ad-
dress of the internal register to be accessed next. When RS is
high, the addressed register may be accessed.
The read/write signal.
Determines whether data is to be written into or read from an
internal register.
R/W' is low for a write operation, high for a read operation.
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