Theory Of Operation - Zenith Z-100 Reference Manual

Theory of Operation

O
In order to darify exactly how memory is accessed and manipulated, the following
description of memory circuit operation is provided.
Refer to the memory card block diagram in Figure 6.2 for the general functional
description of the memory circuits which follows.
MEMR
MEMW
AEN
O
CLK
A O-A1 9
DO-DT
RASTIM
CASTIM
TIMER/
ENCODER
MUXTIM
A16 — A19
CASGATE
CAS
CYCLE
GENERATION
J401
(GND OR + sv )
DACKO
ADDRESS
MAO-MAS
MULTI-
PLEXER
DATA
MDO-MD7
BUFFER
Figure 6.2. Memory Access Block Diagram
BMEMW
R EAD/W R I T E
RASO-RAS4
C ASO- C A S 4
CHECK
D ISABLE
Page 6.5
System Memory
WE
SYSTEM
RAM
PARITY
RAM
PARITY
PAR IT Y
OUT
IN
PARITY
GENERATOR/
CHECKER
G E N E RATION
DI S A B L E